Struct stm32f0xx_hal::pac::rcc::cfgr::R [−][src]
pub struct R(_);
Expand description
Register CFGR
reader
Implementations
Bit 14 - APCPRE is deprecated. See ADC field in CFGR2 register.
Bit 17 - HSE divider for PLL entry. Same bit as PREDIC[0] from CFGR2 register. Refer to it for its meaning
Bit 31 - PLL clock not divided for MCO
Methods from Deref<Target = R<CFGR_SPEC>>
Reads raw bits from register.