Module stm32f0xx_hal::pac::adc::cfgr1 [−][src]
Expand description
configuration register 1
Structs
Field ALIGN reader - Data alignment
Field ALIGN writer - Data alignment
Field AUTOFF reader - Auto-off mode
Field AUTOFF writer - Auto-off mode
Field AWDCH reader - Analog watchdog channel selection
Field AWDCH writer - Analog watchdog channel selection
Field AWDEN reader - Analog watchdog enable
Field AWDEN writer - Analog watchdog enable
Field AWDSGL reader - Enable the watchdog on a single channel or on all channels
Field AWDSGL writer - Enable the watchdog on a single channel or on all channels
configuration register 1
Field CONT reader - Single / continuous conversion mode
Field CONT writer - Single / continuous conversion mode
Field DISCEN reader - Discontinuous mode
Field DISCEN writer - Discontinuous mode
Field DMACFG reader - Direct memery access configuration
Field DMACFG writer - Direct memery access configuration
Field DMAEN reader - Direct memory access enable
Field DMAEN writer - Direct memory access enable
Field EXTEN reader - External trigger enable and polarity selection
Field EXTEN writer - External trigger enable and polarity selection
Field EXTSEL reader - External trigger selection
Field EXTSEL writer - External trigger selection
Field OVRMOD reader - Overrun management mode
Field OVRMOD writer - Overrun management mode
Register CFGR1 reader
Field RES reader - Data resolution
Field RES writer - Data resolution
Field SCANDIR reader - Scan sequence direction
Field SCANDIR writer - Scan sequence direction
Register CFGR1 writer
Field WAIT reader - Wait conversion mode
Field WAIT writer - Wait conversion mode
Enums
Data alignment
Auto-off mode
Analog watchdog enable
Enable the watchdog on a single channel or on all channels
Single / continuous conversion mode
Discontinuous mode
Direct memery access configuration
Direct memory access enable
External trigger enable and polarity selection
External trigger selection
Overrun management mode
Data resolution
Scan sequence direction
Wait conversion mode