Module stm32f0xx_hal::spi

API for the integrate SPI peripherals

The spi bus acts as the master (generating the clock) and you need to handle the CS separately.

The most significant bit is transmitted first & only 8-bit transfers are supported

Example

Echo incoming data in the next transfer

use stm32f0xx_hal as hal;

use crate::hal::pac;
use crate::hal::prelude::*;
use crate::hal::spi::{Spi, Mode, Phase, Polarity};

cortex_m::interrupt::free(|cs| {
    let mut p = pac::Peripherals::take().unwrap();
    let mut rcc = p.RCC.constrain().freeze(&mut p.FLASH);

    let gpioa = p.GPIOA.split(&mut rcc);

    // Configure pins for SPI
    let sck = gpioa.pa5.into_alternate_af0(cs);
    let miso = gpioa.pa6.into_alternate_af0(cs);
    let mosi = gpioa.pa7.into_alternate_af0(cs);

    // Configure SPI with 1MHz rate
    let mut spi = Spi::spi1(p.SPI1, (sck, miso, mosi), Mode {
        polarity: Polarity::IdleHigh,
        phase: Phase::CaptureOnSecondTransition,
    }, 1.mhz(), &mut rcc);

    let mut data = [0];
    loop {
        spi.transfer(&mut data).unwrap();
    }
});

Structs

EightBit	Typestate for 8-bit transfer size
Mode	SPI mode
SixteenBit	Typestate for 16-bit transfer size
Spi	SPI abstraction

Enums

Error	SPI error
Phase	Clock phase
Polarity	Clock polarity

Traits

MisoPin
MosiPin
SckPin