[][src]Enum stm32f0xx_hal::pac::tim1::egr::TG_AW

pub enum TG_AW {
    TRIGGER,
}

Trigger generation

Value on reset: 0

Variants

TRIGGER

1: The TIF flag is set in TIMx_SR register. Related interrupt or DMA transfer can occur if enabled.

Trait Implementations

impl Clone for TG_AW[src]

impl Copy for TG_AW[src]

impl Debug for TG_AW[src]

impl PartialEq<TG_AW> for TG_AW[src]

Auto Trait Implementations

impl Send for TG_AW

impl Sync for TG_AW

impl Unpin for TG_AW

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.