stm32f0/stm32f0x2/adc/
ccr.rs

1///Register `CCR` reader
2pub type R = crate::R<CCRrs>;
3///Register `CCR` writer
4pub type W = crate::W<CCRrs>;
5/**Temperature sensor and VREFINT enable
6
7Value on reset: 0*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum VREFEN {
11    ///0: V_REFINT channel disabled
12    Disabled = 0,
13    ///1: V_REFINT channel enabled
14    Enabled = 1,
15}
16impl From<VREFEN> for bool {
17    #[inline(always)]
18    fn from(variant: VREFEN) -> Self {
19        variant as u8 != 0
20    }
21}
22///Field `VREFEN` reader - Temperature sensor and VREFINT enable
23pub type VREFEN_R = crate::BitReader<VREFEN>;
24impl VREFEN_R {
25    ///Get enumerated values variant
26    #[inline(always)]
27    pub const fn variant(&self) -> VREFEN {
28        match self.bits {
29            false => VREFEN::Disabled,
30            true => VREFEN::Enabled,
31        }
32    }
33    ///V_REFINT channel disabled
34    #[inline(always)]
35    pub fn is_disabled(&self) -> bool {
36        *self == VREFEN::Disabled
37    }
38    ///V_REFINT channel enabled
39    #[inline(always)]
40    pub fn is_enabled(&self) -> bool {
41        *self == VREFEN::Enabled
42    }
43}
44///Field `VREFEN` writer - Temperature sensor and VREFINT enable
45pub type VREFEN_W<'a, REG> = crate::BitWriter<'a, REG, VREFEN>;
46impl<'a, REG> VREFEN_W<'a, REG>
47where
48    REG: crate::Writable + crate::RegisterSpec,
49{
50    ///V_REFINT channel disabled
51    #[inline(always)]
52    pub fn disabled(self) -> &'a mut crate::W<REG> {
53        self.variant(VREFEN::Disabled)
54    }
55    ///V_REFINT channel enabled
56    #[inline(always)]
57    pub fn enabled(self) -> &'a mut crate::W<REG> {
58        self.variant(VREFEN::Enabled)
59    }
60}
61/**Temperature sensor enable
62
63Value on reset: 0*/
64#[cfg_attr(feature = "defmt", derive(defmt::Format))]
65#[derive(Clone, Copy, Debug, PartialEq, Eq)]
66pub enum TSEN {
67    ///0: Temperature sensor disabled
68    Disabled = 0,
69    ///1: Temperature sensor enabled
70    Enabled = 1,
71}
72impl From<TSEN> for bool {
73    #[inline(always)]
74    fn from(variant: TSEN) -> Self {
75        variant as u8 != 0
76    }
77}
78///Field `TSEN` reader - Temperature sensor enable
79pub type TSEN_R = crate::BitReader<TSEN>;
80impl TSEN_R {
81    ///Get enumerated values variant
82    #[inline(always)]
83    pub const fn variant(&self) -> TSEN {
84        match self.bits {
85            false => TSEN::Disabled,
86            true => TSEN::Enabled,
87        }
88    }
89    ///Temperature sensor disabled
90    #[inline(always)]
91    pub fn is_disabled(&self) -> bool {
92        *self == TSEN::Disabled
93    }
94    ///Temperature sensor enabled
95    #[inline(always)]
96    pub fn is_enabled(&self) -> bool {
97        *self == TSEN::Enabled
98    }
99}
100///Field `TSEN` writer - Temperature sensor enable
101pub type TSEN_W<'a, REG> = crate::BitWriter<'a, REG, TSEN>;
102impl<'a, REG> TSEN_W<'a, REG>
103where
104    REG: crate::Writable + crate::RegisterSpec,
105{
106    ///Temperature sensor disabled
107    #[inline(always)]
108    pub fn disabled(self) -> &'a mut crate::W<REG> {
109        self.variant(TSEN::Disabled)
110    }
111    ///Temperature sensor enabled
112    #[inline(always)]
113    pub fn enabled(self) -> &'a mut crate::W<REG> {
114        self.variant(TSEN::Enabled)
115    }
116}
117/**VBAT enable
118
119Value on reset: 0*/
120#[cfg_attr(feature = "defmt", derive(defmt::Format))]
121#[derive(Clone, Copy, Debug, PartialEq, Eq)]
122pub enum VBATEN {
123    ///0: V_BAT channel disabled
124    Disabled = 0,
125    ///1: V_BAT channel enabled
126    Enabled = 1,
127}
128impl From<VBATEN> for bool {
129    #[inline(always)]
130    fn from(variant: VBATEN) -> Self {
131        variant as u8 != 0
132    }
133}
134///Field `VBATEN` reader - VBAT enable
135pub type VBATEN_R = crate::BitReader<VBATEN>;
136impl VBATEN_R {
137    ///Get enumerated values variant
138    #[inline(always)]
139    pub const fn variant(&self) -> VBATEN {
140        match self.bits {
141            false => VBATEN::Disabled,
142            true => VBATEN::Enabled,
143        }
144    }
145    ///V_BAT channel disabled
146    #[inline(always)]
147    pub fn is_disabled(&self) -> bool {
148        *self == VBATEN::Disabled
149    }
150    ///V_BAT channel enabled
151    #[inline(always)]
152    pub fn is_enabled(&self) -> bool {
153        *self == VBATEN::Enabled
154    }
155}
156///Field `VBATEN` writer - VBAT enable
157pub type VBATEN_W<'a, REG> = crate::BitWriter<'a, REG, VBATEN>;
158impl<'a, REG> VBATEN_W<'a, REG>
159where
160    REG: crate::Writable + crate::RegisterSpec,
161{
162    ///V_BAT channel disabled
163    #[inline(always)]
164    pub fn disabled(self) -> &'a mut crate::W<REG> {
165        self.variant(VBATEN::Disabled)
166    }
167    ///V_BAT channel enabled
168    #[inline(always)]
169    pub fn enabled(self) -> &'a mut crate::W<REG> {
170        self.variant(VBATEN::Enabled)
171    }
172}
173impl R {
174    ///Bit 22 - Temperature sensor and VREFINT enable
175    #[inline(always)]
176    pub fn vrefen(&self) -> VREFEN_R {
177        VREFEN_R::new(((self.bits >> 22) & 1) != 0)
178    }
179    ///Bit 23 - Temperature sensor enable
180    #[inline(always)]
181    pub fn tsen(&self) -> TSEN_R {
182        TSEN_R::new(((self.bits >> 23) & 1) != 0)
183    }
184    ///Bit 24 - VBAT enable
185    #[inline(always)]
186    pub fn vbaten(&self) -> VBATEN_R {
187        VBATEN_R::new(((self.bits >> 24) & 1) != 0)
188    }
189}
190impl core::fmt::Debug for R {
191    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
192        f.debug_struct("CCR")
193            .field("vbaten", &self.vbaten())
194            .field("tsen", &self.tsen())
195            .field("vrefen", &self.vrefen())
196            .finish()
197    }
198}
199impl W {
200    ///Bit 22 - Temperature sensor and VREFINT enable
201    #[inline(always)]
202    pub fn vrefen(&mut self) -> VREFEN_W<CCRrs> {
203        VREFEN_W::new(self, 22)
204    }
205    ///Bit 23 - Temperature sensor enable
206    #[inline(always)]
207    pub fn tsen(&mut self) -> TSEN_W<CCRrs> {
208        TSEN_W::new(self, 23)
209    }
210    ///Bit 24 - VBAT enable
211    #[inline(always)]
212    pub fn vbaten(&mut self) -> VBATEN_W<CCRrs> {
213        VBATEN_W::new(self, 24)
214    }
215}
216/**common configuration register
217
218You can [`read`](crate::Reg::read) this register and get [`ccr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
219
220See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F0x2.html#ADC:CCR)*/
221pub struct CCRrs;
222impl crate::RegisterSpec for CCRrs {
223    type Ux = u32;
224}
225///`read()` method returns [`ccr::R`](R) reader structure
226impl crate::Readable for CCRrs {}
227///`write(|w| ..)` method takes [`ccr::W`](W) writer structure
228impl crate::Writable for CCRrs {
229    type Safety = crate::Unsafe;
230}
231///`reset()` method sets CCR to value 0
232impl crate::Resettable for CCRrs {}
stm32f0/stm32f0x2/adc/ccr.rs

stm32f0/stm32f0x2/adc/
ccr.rs
