stm32f0/stm32f0x0/spi1/
sr.rs

1///Register `SR` reader
2pub type R = crate::R<SRrs>;
3///Register `SR` writer
4pub type W = crate::W<SRrs>;
5/**Receive buffer not empty
6
7Value on reset: 0*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum RXNE {
11    ///0: Rx buffer empty
12    Empty = 0,
13    ///1: Rx buffer not empty
14    NotEmpty = 1,
15}
16impl From<RXNE> for bool {
17    #[inline(always)]
18    fn from(variant: RXNE) -> Self {
19        variant as u8 != 0
20    }
21}
22///Field `RXNE` reader - Receive buffer not empty
23pub type RXNE_R = crate::BitReader<RXNE>;
24impl RXNE_R {
25    ///Get enumerated values variant
26    #[inline(always)]
27    pub const fn variant(&self) -> RXNE {
28        match self.bits {
29            false => RXNE::Empty,
30            true => RXNE::NotEmpty,
31        }
32    }
33    ///Rx buffer empty
34    #[inline(always)]
35    pub fn is_empty(&self) -> bool {
36        *self == RXNE::Empty
37    }
38    ///Rx buffer not empty
39    #[inline(always)]
40    pub fn is_not_empty(&self) -> bool {
41        *self == RXNE::NotEmpty
42    }
43}
44/**Transmit buffer empty
45
46Value on reset: 1*/
47#[cfg_attr(feature = "defmt", derive(defmt::Format))]
48#[derive(Clone, Copy, Debug, PartialEq, Eq)]
49pub enum TXE {
50    ///0: Tx buffer not empty
51    NotEmpty = 0,
52    ///1: Tx buffer empty
53    Empty = 1,
54}
55impl From<TXE> for bool {
56    #[inline(always)]
57    fn from(variant: TXE) -> Self {
58        variant as u8 != 0
59    }
60}
61///Field `TXE` reader - Transmit buffer empty
62pub type TXE_R = crate::BitReader<TXE>;
63impl TXE_R {
64    ///Get enumerated values variant
65    #[inline(always)]
66    pub const fn variant(&self) -> TXE {
67        match self.bits {
68            false => TXE::NotEmpty,
69            true => TXE::Empty,
70        }
71    }
72    ///Tx buffer not empty
73    #[inline(always)]
74    pub fn is_not_empty(&self) -> bool {
75        *self == TXE::NotEmpty
76    }
77    ///Tx buffer empty
78    #[inline(always)]
79    pub fn is_empty(&self) -> bool {
80        *self == TXE::Empty
81    }
82}
83/**CRC error flag
84
85Value on reset: 0*/
86#[cfg_attr(feature = "defmt", derive(defmt::Format))]
87#[derive(Clone, Copy, Debug, PartialEq, Eq)]
88pub enum CRCERRR {
89    ///0: CRC value received matches the SPIx_RXCRCR value
90    Match = 0,
91    ///1: CRC value received does not match the SPIx_RXCRCR value
92    NoMatch = 1,
93}
94impl From<CRCERRR> for bool {
95    #[inline(always)]
96    fn from(variant: CRCERRR) -> Self {
97        variant as u8 != 0
98    }
99}
100///Field `CRCERR` reader - CRC error flag
101pub type CRCERR_R = crate::BitReader<CRCERRR>;
102impl CRCERR_R {
103    ///Get enumerated values variant
104    #[inline(always)]
105    pub const fn variant(&self) -> CRCERRR {
106        match self.bits {
107            false => CRCERRR::Match,
108            true => CRCERRR::NoMatch,
109        }
110    }
111    ///CRC value received matches the SPIx_RXCRCR value
112    #[inline(always)]
113    pub fn is_match(&self) -> bool {
114        *self == CRCERRR::Match
115    }
116    ///CRC value received does not match the SPIx_RXCRCR value
117    #[inline(always)]
118    pub fn is_no_match(&self) -> bool {
119        *self == CRCERRR::NoMatch
120    }
121}
122/**CRC error flag
123
124Value on reset: 0*/
125#[cfg_attr(feature = "defmt", derive(defmt::Format))]
126#[derive(Clone, Copy, Debug, PartialEq, Eq)]
127pub enum CRCERRW {
128    ///0: Clear flag
129    Clear = 0,
130}
131impl From<CRCERRW> for bool {
132    #[inline(always)]
133    fn from(variant: CRCERRW) -> Self {
134        variant as u8 != 0
135    }
136}
137///Field `CRCERR` writer - CRC error flag
138pub type CRCERR_W<'a, REG> = crate::BitWriter0C<'a, REG, CRCERRW>;
139impl<'a, REG> CRCERR_W<'a, REG>
140where
141    REG: crate::Writable + crate::RegisterSpec,
142{
143    ///Clear flag
144    #[inline(always)]
145    pub fn clear(self) -> &'a mut crate::W<REG> {
146        self.variant(CRCERRW::Clear)
147    }
148}
149/**Mode fault
150
151Value on reset: 0*/
152#[cfg_attr(feature = "defmt", derive(defmt::Format))]
153#[derive(Clone, Copy, Debug, PartialEq, Eq)]
154pub enum MODFR {
155    ///0: No mode fault occurred
156    NoFault = 0,
157    ///1: Mode fault occurred
158    Fault = 1,
159}
160impl From<MODFR> for bool {
161    #[inline(always)]
162    fn from(variant: MODFR) -> Self {
163        variant as u8 != 0
164    }
165}
166///Field `MODF` reader - Mode fault
167pub type MODF_R = crate::BitReader<MODFR>;
168impl MODF_R {
169    ///Get enumerated values variant
170    #[inline(always)]
171    pub const fn variant(&self) -> MODFR {
172        match self.bits {
173            false => MODFR::NoFault,
174            true => MODFR::Fault,
175        }
176    }
177    ///No mode fault occurred
178    #[inline(always)]
179    pub fn is_no_fault(&self) -> bool {
180        *self == MODFR::NoFault
181    }
182    ///Mode fault occurred
183    #[inline(always)]
184    pub fn is_fault(&self) -> bool {
185        *self == MODFR::Fault
186    }
187}
188/**Overrun flag
189
190Value on reset: 0*/
191#[cfg_attr(feature = "defmt", derive(defmt::Format))]
192#[derive(Clone, Copy, Debug, PartialEq, Eq)]
193pub enum OVRR {
194    ///0: No overrun occurred
195    NoOverrun = 0,
196    ///1: Overrun occurred
197    Overrun = 1,
198}
199impl From<OVRR> for bool {
200    #[inline(always)]
201    fn from(variant: OVRR) -> Self {
202        variant as u8 != 0
203    }
204}
205///Field `OVR` reader - Overrun flag
206pub type OVR_R = crate::BitReader<OVRR>;
207impl OVR_R {
208    ///Get enumerated values variant
209    #[inline(always)]
210    pub const fn variant(&self) -> OVRR {
211        match self.bits {
212            false => OVRR::NoOverrun,
213            true => OVRR::Overrun,
214        }
215    }
216    ///No overrun occurred
217    #[inline(always)]
218    pub fn is_no_overrun(&self) -> bool {
219        *self == OVRR::NoOverrun
220    }
221    ///Overrun occurred
222    #[inline(always)]
223    pub fn is_overrun(&self) -> bool {
224        *self == OVRR::Overrun
225    }
226}
227/**Busy flag
228
229Value on reset: 0*/
230#[cfg_attr(feature = "defmt", derive(defmt::Format))]
231#[derive(Clone, Copy, Debug, PartialEq, Eq)]
232pub enum BSYR {
233    ///0: SPI not busy
234    NotBusy = 0,
235    ///1: SPI busy
236    Busy = 1,
237}
238impl From<BSYR> for bool {
239    #[inline(always)]
240    fn from(variant: BSYR) -> Self {
241        variant as u8 != 0
242    }
243}
244///Field `BSY` reader - Busy flag
245pub type BSY_R = crate::BitReader<BSYR>;
246impl BSY_R {
247    ///Get enumerated values variant
248    #[inline(always)]
249    pub const fn variant(&self) -> BSYR {
250        match self.bits {
251            false => BSYR::NotBusy,
252            true => BSYR::Busy,
253        }
254    }
255    ///SPI not busy
256    #[inline(always)]
257    pub fn is_not_busy(&self) -> bool {
258        *self == BSYR::NotBusy
259    }
260    ///SPI busy
261    #[inline(always)]
262    pub fn is_busy(&self) -> bool {
263        *self == BSYR::Busy
264    }
265}
266/**Frame format error
267
268Value on reset: 0*/
269#[cfg_attr(feature = "defmt", derive(defmt::Format))]
270#[derive(Clone, Copy, Debug, PartialEq, Eq)]
271pub enum FRER {
272    ///0: No frame format error
273    NoError = 0,
274    ///1: A frame format error occurred
275    Error = 1,
276}
277impl From<FRER> for bool {
278    #[inline(always)]
279    fn from(variant: FRER) -> Self {
280        variant as u8 != 0
281    }
282}
283///Field `FRE` reader - Frame format error
284pub type FRE_R = crate::BitReader<FRER>;
285impl FRE_R {
286    ///Get enumerated values variant
287    #[inline(always)]
288    pub const fn variant(&self) -> FRER {
289        match self.bits {
290            false => FRER::NoError,
291            true => FRER::Error,
292        }
293    }
294    ///No frame format error
295    #[inline(always)]
296    pub fn is_no_error(&self) -> bool {
297        *self == FRER::NoError
298    }
299    ///A frame format error occurred
300    #[inline(always)]
301    pub fn is_error(&self) -> bool {
302        *self == FRER::Error
303    }
304}
305/**FIFO reception level
306
307Value on reset: 0*/
308#[cfg_attr(feature = "defmt", derive(defmt::Format))]
309#[derive(Clone, Copy, Debug, PartialEq, Eq)]
310#[repr(u8)]
311pub enum FRLVLR {
312    ///0: Rx FIFO Empty
313    Empty = 0,
314    ///1: Rx 1/4 FIFO
315    Quarter = 1,
316    ///2: Rx 1/2 FIFO
317    Half = 2,
318    ///3: Rx FIFO full
319    Full = 3,
320}
321impl From<FRLVLR> for u8 {
322    #[inline(always)]
323    fn from(variant: FRLVLR) -> Self {
324        variant as _
325    }
326}
327impl crate::FieldSpec for FRLVLR {
328    type Ux = u8;
329}
330impl crate::IsEnum for FRLVLR {}
331///Field `FRLVL` reader - FIFO reception level
332pub type FRLVL_R = crate::FieldReader<FRLVLR>;
333impl FRLVL_R {
334    ///Get enumerated values variant
335    #[inline(always)]
336    pub const fn variant(&self) -> FRLVLR {
337        match self.bits {
338            0 => FRLVLR::Empty,
339            1 => FRLVLR::Quarter,
340            2 => FRLVLR::Half,
341            3 => FRLVLR::Full,
342            _ => unreachable!(),
343        }
344    }
345    ///Rx FIFO Empty
346    #[inline(always)]
347    pub fn is_empty(&self) -> bool {
348        *self == FRLVLR::Empty
349    }
350    ///Rx 1/4 FIFO
351    #[inline(always)]
352    pub fn is_quarter(&self) -> bool {
353        *self == FRLVLR::Quarter
354    }
355    ///Rx 1/2 FIFO
356    #[inline(always)]
357    pub fn is_half(&self) -> bool {
358        *self == FRLVLR::Half
359    }
360    ///Rx FIFO full
361    #[inline(always)]
362    pub fn is_full(&self) -> bool {
363        *self == FRLVLR::Full
364    }
365}
366/**FIFO transmission level
367
368Value on reset: 0*/
369#[cfg_attr(feature = "defmt", derive(defmt::Format))]
370#[derive(Clone, Copy, Debug, PartialEq, Eq)]
371#[repr(u8)]
372pub enum FTLVLR {
373    ///0: Tx FIFO Empty
374    Empty = 0,
375    ///1: Tx 1/4 FIFO
376    Quarter = 1,
377    ///2: Tx 1/2 FIFO
378    Half = 2,
379    ///3: Tx FIFO full
380    Full = 3,
381}
382impl From<FTLVLR> for u8 {
383    #[inline(always)]
384    fn from(variant: FTLVLR) -> Self {
385        variant as _
386    }
387}
388impl crate::FieldSpec for FTLVLR {
389    type Ux = u8;
390}
391impl crate::IsEnum for FTLVLR {}
392///Field `FTLVL` reader - FIFO transmission level
393pub type FTLVL_R = crate::FieldReader<FTLVLR>;
394impl FTLVL_R {
395    ///Get enumerated values variant
396    #[inline(always)]
397    pub const fn variant(&self) -> FTLVLR {
398        match self.bits {
399            0 => FTLVLR::Empty,
400            1 => FTLVLR::Quarter,
401            2 => FTLVLR::Half,
402            3 => FTLVLR::Full,
403            _ => unreachable!(),
404        }
405    }
406    ///Tx FIFO Empty
407    #[inline(always)]
408    pub fn is_empty(&self) -> bool {
409        *self == FTLVLR::Empty
410    }
411    ///Tx 1/4 FIFO
412    #[inline(always)]
413    pub fn is_quarter(&self) -> bool {
414        *self == FTLVLR::Quarter
415    }
416    ///Tx 1/2 FIFO
417    #[inline(always)]
418    pub fn is_half(&self) -> bool {
419        *self == FTLVLR::Half
420    }
421    ///Tx FIFO full
422    #[inline(always)]
423    pub fn is_full(&self) -> bool {
424        *self == FTLVLR::Full
425    }
426}
427impl R {
428    ///Bit 0 - Receive buffer not empty
429    #[inline(always)]
430    pub fn rxne(&self) -> RXNE_R {
431        RXNE_R::new((self.bits & 1) != 0)
432    }
433    ///Bit 1 - Transmit buffer empty
434    #[inline(always)]
435    pub fn txe(&self) -> TXE_R {
436        TXE_R::new(((self.bits >> 1) & 1) != 0)
437    }
438    ///Bit 4 - CRC error flag
439    #[inline(always)]
440    pub fn crcerr(&self) -> CRCERR_R {
441        CRCERR_R::new(((self.bits >> 4) & 1) != 0)
442    }
443    ///Bit 5 - Mode fault
444    #[inline(always)]
445    pub fn modf(&self) -> MODF_R {
446        MODF_R::new(((self.bits >> 5) & 1) != 0)
447    }
448    ///Bit 6 - Overrun flag
449    #[inline(always)]
450    pub fn ovr(&self) -> OVR_R {
451        OVR_R::new(((self.bits >> 6) & 1) != 0)
452    }
453    ///Bit 7 - Busy flag
454    #[inline(always)]
455    pub fn bsy(&self) -> BSY_R {
456        BSY_R::new(((self.bits >> 7) & 1) != 0)
457    }
458    ///Bit 8 - Frame format error
459    #[inline(always)]
460    pub fn fre(&self) -> FRE_R {
461        FRE_R::new(((self.bits >> 8) & 1) != 0)
462    }
463    ///Bits 9:10 - FIFO reception level
464    #[inline(always)]
465    pub fn frlvl(&self) -> FRLVL_R {
466        FRLVL_R::new(((self.bits >> 9) & 3) as u8)
467    }
468    ///Bits 11:12 - FIFO transmission level
469    #[inline(always)]
470    pub fn ftlvl(&self) -> FTLVL_R {
471        FTLVL_R::new(((self.bits >> 11) & 3) as u8)
472    }
473}
474impl core::fmt::Debug for R {
475    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
476        f.debug_struct("SR")
477            .field("rxne", &self.rxne())
478            .field("txe", &self.txe())
479            .field("crcerr", &self.crcerr())
480            .field("modf", &self.modf())
481            .field("ovr", &self.ovr())
482            .field("bsy", &self.bsy())
483            .field("fre", &self.fre())
484            .field("frlvl", &self.frlvl())
485            .field("ftlvl", &self.ftlvl())
486            .finish()
487    }
488}
489impl W {
490    ///Bit 4 - CRC error flag
491    #[inline(always)]
492    pub fn crcerr(&mut self) -> CRCERR_W<SRrs> {
493        CRCERR_W::new(self, 4)
494    }
495}
496/**status register
497
498You can [`read`](crate::Reg::read) this register and get [`sr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
499
500See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F0x0.html#SPI1:SR)*/
501pub struct SRrs;
502impl crate::RegisterSpec for SRrs {
503    type Ux = u16;
504}
505///`read()` method returns [`sr::R`](R) reader structure
506impl crate::Readable for SRrs {}
507///`write(|w| ..)` method takes [`sr::W`](W) writer structure
508impl crate::Writable for SRrs {
509    type Safety = crate::Unsafe;
510    const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0x10;
511}
512///`reset()` method sets SR to value 0x02
513impl crate::Resettable for SRrs {
514    const RESET_VALUE: u16 = 0x02;
515}
stm32f0/stm32f0x0/spi1/sr.rs

stm32f0/stm32f0x0/spi1/
sr.rs
