Module stm32_hal2::pac::sdmmc1::dctrl

source ·
Expand description

The SDMMC_DCTRL register control the data path state machine (DPSM).

Structs§

  • The SDMMC_DCTRL register control the data path state machine (DPSM).
  • Register DCTRL reader
  • Register DCTRL writer

Type Aliases§

  • Field BOOTACKEN reader - Enable the reception of the boot acknowledgment. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).
  • Field BOOTACKEN writer - Enable the reception of the boot acknowledgment. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).
  • Field DBLOCKSIZE reader - Data block size This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). Define the data block length when the block data transfer mode is selected: When DATALENGTH is not a multiple of DBLOCKSIZE, the transfered data is truncated at a multiple of DBLOCKSIZE. (Any remain data will not be transfered.) When DDR = 1, DBLOCKSIZE = 0000 shall not be used. (No data will be transfered)
  • Field DBLOCKSIZE writer - Data block size This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). Define the data block length when the block data transfer mode is selected: When DATALENGTH is not a multiple of DBLOCKSIZE, the transfered data is truncated at a multiple of DBLOCKSIZE. (Any remain data will not be transfered.) When DDR = 1, DBLOCKSIZE = 0000 shall not be used. (No data will be transfered)
  • Field DTDIR reader - Data transfer direction selection This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).
  • Field DTDIR writer - Data transfer direction selection This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).
  • Field DTEN reader - Data transfer enable bit This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). This bit is cleared by Hardware when data transfer completes. This bit shall only be used to transfer data when no associated data transfer command is used, i.e. shall not be used with SD or eMMC cards.
  • Field DTEN writer - Data transfer enable bit This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). This bit is cleared by Hardware when data transfer completes. This bit shall only be used to transfer data when no associated data transfer command is used, i.e. shall not be used with SD or eMMC cards.
  • Field DTMODE reader - Data transfer mode selection. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).
  • Field DTMODE writer - Data transfer mode selection. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).
  • Field FIFORST reader - FIFO reset, will flush any remaining data. This bit can only be written by firmware when IDMAEN= 0 and DPSM is active (DPSMACT = 1). This bit will only take effect when a transfer error or transfer hold occurs.
  • Field FIFORST writer - FIFO reset, will flush any remaining data. This bit can only be written by firmware when IDMAEN= 0 and DPSM is active (DPSMACT = 1). This bit will only take effect when a transfer error or transfer hold occurs.
  • Field RWMOD reader - Read wait mode. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).
  • Field RWMOD writer - Read wait mode. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).
  • Field RWSTART reader - Read wait start. If this bit is set, read wait operation starts.
  • Field RWSTART writer - Read wait start. If this bit is set, read wait operation starts.
  • Field RWSTOP reader - Read wait stop This bit is written by firmware and auto cleared by hardware when the DPSM moves from the READ_WAIT state to the WAIT_R or IDLE state.
  • Field RWSTOP writer - Read wait stop This bit is written by firmware and auto cleared by hardware when the DPSM moves from the READ_WAIT state to the WAIT_R or IDLE state.
  • Field SDIOEN reader - SD I/O interrupt enable functions This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). If this bit is set, the DPSM enables the SD I/O card specific interrupt operation.
  • Field SDIOEN writer - SD I/O interrupt enable functions This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). If this bit is set, the DPSM enables the SD I/O card specific interrupt operation.