Module stm32_hal2::pac::rtc::cr

RTC control register

Structs

• CR_SPEC
  RTC control register
• R
  Register CR reader
• W
  Register CR writer

Enums

• ADD1H_AW
  Add 1 hour (summer time change) When this bit is set outside initialization mode, 1 hour is added to the calendar time. This bit is always read as 0.
• ALRAE_A
  Alarm A enable
• ALRAIE_A
  Alarm A interrupt enable
• ALRBE_A
  Alarm B enable
• ALRBIE_A
  Alarm B interrupt enable
• BKP_A
  Backup This bit can be written by the user to memorize whether the daylight saving time change has been performed or not.
• BYPSHAD_A
  Bypass the shadow registers Note: If the frequency of the APB clock is less than seven times the frequency of RTCCLK, BYPSHAD must be set to 1.
• COE_A
  Calibration output enable This bit enables the RTC_CALIB output
• COSEL_A
  Calibration output selection When COE=1, this bit selects which signal is output on RTC_CALIB. These frequencies are valid for RTCCLK at 32.768 kHz and prescalers at their default values (PREDIV_A=127 and PREDIV_S=255). Refer to Section24.3.15: Calibration clock output
• FMT_A
  Hour format
• ITSE_A
  timestamp on internal event enable
• OSEL_A
  Output selection These bits are used to select the flag to be routed to RTC_ALARM output
• POL_A
  Output polarity This bit is used to configure the polarity of RTC_ALARM output
• REFCKON_A
  RTC_REFIN reference clock detection enable (50 or 60Hz) Note: PREDIV_S must be 0x00FF.
• SUB1H_AW
  Subtract 1 hour (winter time change) When this bit is set outside initialization mode, 1 hour is subtracted to the calendar time if the current hour is not 0. This bit is always read as 0. Setting this bit has no effect when current hour is 0.
• TSEDGE_A
  Time-stamp event active edge TSE must be reset when TSEDGE is changed to avoid unwanted TSF setting.
• TSE_A
  timestamp enable
• TSIE_A
  Time-stamp interrupt enable
• WUCKSEL_A
  Wakeup clock selection
• WUTE_A
  Wakeup timer enable
• WUTIE_A
  Wakeup timer interrupt enable

Type Aliases

• ADD1H_W
  Field ADD1H writer - Add 1 hour (summer time change) When this bit is set outside initialization mode, 1 hour is added to the calendar time. This bit is always read as 0.
• ALRAE_R
  Field ALRAE reader - Alarm A enable
• ALRAE_W
  Field ALRAE writer - Alarm A enable
• ALRAIE_R
  Field ALRAIE reader - Alarm A interrupt enable
• ALRAIE_W
  Field ALRAIE writer - Alarm A interrupt enable
• ALRBE_R
  Field ALRBE reader - Alarm B enable
• ALRBE_W
  Field ALRBE writer - Alarm B enable
• ALRBIE_R
  Field ALRBIE reader - Alarm B interrupt enable
• ALRBIE_W
  Field ALRBIE writer - Alarm B interrupt enable
• BKP_R
  Field BKP reader - Backup This bit can be written by the user to memorize whether the daylight saving time change has been performed or not.
• BKP_W
  Field BKP writer - Backup This bit can be written by the user to memorize whether the daylight saving time change has been performed or not.
• BYPSHAD_R
  Field BYPSHAD reader - Bypass the shadow registers Note: If the frequency of the APB clock is less than seven times the frequency of RTCCLK, BYPSHAD must be set to 1.
• BYPSHAD_W
  Field BYPSHAD writer - Bypass the shadow registers Note: If the frequency of the APB clock is less than seven times the frequency of RTCCLK, BYPSHAD must be set to 1.
• COE_R
  Field COE reader - Calibration output enable This bit enables the RTC_CALIB output
• COE_W
  Field COE writer - Calibration output enable This bit enables the RTC_CALIB output
• COSEL_R
  Field COSEL reader - Calibration output selection When COE=1, this bit selects which signal is output on RTC_CALIB. These frequencies are valid for RTCCLK at 32.768 kHz and prescalers at their default values (PREDIV_A=127 and PREDIV_S=255). Refer to Section24.3.15: Calibration clock output
• COSEL_W
  Field COSEL writer - Calibration output selection When COE=1, this bit selects which signal is output on RTC_CALIB. These frequencies are valid for RTCCLK at 32.768 kHz and prescalers at their default values (PREDIV_A=127 and PREDIV_S=255). Refer to Section24.3.15: Calibration clock output
• FMT_R
  Field FMT reader - Hour format
• FMT_W
  Field FMT writer - Hour format
• ITSE_R
  Field ITSE reader - timestamp on internal event enable
• ITSE_W
  Field ITSE writer - timestamp on internal event enable
• OSEL_R
  Field OSEL reader - Output selection These bits are used to select the flag to be routed to RTC_ALARM output
• OSEL_W
  Field OSEL writer - Output selection These bits are used to select the flag to be routed to RTC_ALARM output
• POL_R
  Field POL reader - Output polarity This bit is used to configure the polarity of RTC_ALARM output
• POL_W
  Field POL writer - Output polarity This bit is used to configure the polarity of RTC_ALARM output
• REFCKON_R
  Field REFCKON reader - RTC_REFIN reference clock detection enable (50 or 60Hz) Note: PREDIV_S must be 0x00FF.
• REFCKON_W
  Field REFCKON writer - RTC_REFIN reference clock detection enable (50 or 60Hz) Note: PREDIV_S must be 0x00FF.
• SUB1H_W
  Field SUB1H writer - Subtract 1 hour (winter time change) When this bit is set outside initialization mode, 1 hour is subtracted to the calendar time if the current hour is not 0. This bit is always read as 0. Setting this bit has no effect when current hour is 0.
• TSEDGE_R
  Field TSEDGE reader - Time-stamp event active edge TSE must be reset when TSEDGE is changed to avoid unwanted TSF setting.
• TSEDGE_W
  Field TSEDGE writer - Time-stamp event active edge TSE must be reset when TSEDGE is changed to avoid unwanted TSF setting.
• TSE_R
  Field TSE reader - timestamp enable
• TSE_W
  Field TSE writer - timestamp enable
• TSIE_R
  Field TSIE reader - Time-stamp interrupt enable
• TSIE_W
  Field TSIE writer - Time-stamp interrupt enable
• WUCKSEL_R
  Field WUCKSEL reader - Wakeup clock selection
• WUCKSEL_W
  Field WUCKSEL writer - Wakeup clock selection
• WUTE_R
  Field WUTE reader - Wakeup timer enable
• WUTE_W
  Field WUTE writer - Wakeup timer enable
• WUTIE_R
  Field WUTIE reader - Wakeup timer interrupt enable
• WUTIE_W
  Field WUTIE writer - Wakeup timer interrupt enable