Module stm32_hal2::pac::pwr::d3cr
source · Expand description
This register allows controlling D3 domain power.Following reset VOSRDY will be read 1 by software
Structs§
- This register allows controlling D3 domain power.Following reset VOSRDY will be read 1 by software
- Register
D3CR
reader - Register
D3CR
writer
Type Aliases§
- Field
VOSRDY
reader - VOS Ready bit for VCORE voltage scaling output selection. This bit is set to 1 by hardware when Bypass mode is selected in PWR control register 3 (PWR_CR3). - Field
VOS
reader - Voltage scaling selection according to performance These bits control the VCORE voltage level and allow to obtains the best trade-off between power consumption and performance: When increasing the performance, the voltage scaling shall be changed before increasing the system frequency. When decreasing performance, the system frequency shall first be decreased before changing the voltage scaling. - Field
VOS
writer - Voltage scaling selection according to performance These bits control the VCORE voltage level and allow to obtains the best trade-off between power consumption and performance: When increasing the performance, the voltage scaling shall be changed before increasing the system frequency. When decreasing performance, the system frequency shall first be decreased before changing the voltage scaling.