Module stm32_hal2::pac::fmc::sdcmr

This register contains the command issued when the SDRAM device is accessed. This register is used to initialize the SDRAM device, and to activate the Self-refresh and the Power-down modes. As soon as the MODE field is written, the command will be issued only to one or to both SDRAM banks according to CTB1 and CTB2 command bits. This register is the same for both SDRAM banks.

Structs

• R
  Register SDCMR reader
• SDCMR_SPEC
  This register contains the command issued when the SDRAM device is accessed. This register is used to initialize the SDRAM device, and to activate the Self-refresh and the Power-down modes. As soon as the MODE field is written, the command will be issued only to one or to both SDRAM banks according to CTB1 and CTB2 command bits. This register is the same for both SDRAM banks.
• W
  Register SDCMR writer

Type Aliases

• CTB1_R
  Field CTB1 reader - Command Target Bank 1 This bit indicates whether the command will be issued to SDRAM Bank 1 or not.
• CTB1_W
  Field CTB1 writer - Command Target Bank 1 This bit indicates whether the command will be issued to SDRAM Bank 1 or not.
• CTB2_R
  Field CTB2 reader - Command Target Bank 2 This bit indicates whether the command will be issued to SDRAM Bank 2 or not.
• CTB2_W
  Field CTB2 writer - Command Target Bank 2 This bit indicates whether the command will be issued to SDRAM Bank 2 or not.
• MODE_R
  Field MODE reader - Command mode These bits define the command issued to the SDRAM device. Note: When a command is issued, at least one Command Target Bank bit ( CTB1 or CTB2) must be set otherwise the command will be ignored. Note: If two SDRAM banks are used, the Auto-refresh and PALL command must be issued simultaneously to the two devices with CTB1 and CTB2 bits set otherwise the command will be ignored. Note: If only one SDRAM bank is used and a command is issued with its associated CTB bit set, the other CTB bit of the unused bank must be kept to 0.
• MODE_W
  Field MODE writer - Command mode These bits define the command issued to the SDRAM device. Note: When a command is issued, at least one Command Target Bank bit ( CTB1 or CTB2) must be set otherwise the command will be ignored. Note: If two SDRAM banks are used, the Auto-refresh and PALL command must be issued simultaneously to the two devices with CTB1 and CTB2 bits set otherwise the command will be ignored. Note: If only one SDRAM bank is used and a command is issued with its associated CTB bit set, the other CTB bit of the unused bank must be kept to 0.
• MRD_R
  Field MRD reader - Mode Register definition This 14-bit field defines the SDRAM Mode Register content. The Mode Register is programmed using the Load Mode Register command. The MRD[13:0] bits are also used to program the extended mode register for mobile SDRAM.
• MRD_W
  Field MRD writer - Mode Register definition This 14-bit field defines the SDRAM Mode Register content. The Mode Register is programmed using the Load Mode Register command. The MRD[13:0] bits are also used to program the extended mode register for mobile SDRAM.
• NRFS_R
  Field NRFS reader - Number of Auto-refresh These bits define the number of consecutive Auto-refresh commands issued when MODE = 011. ….
• NRFS_W
  Field NRFS writer - Number of Auto-refresh These bits define the number of consecutive Auto-refresh commands issued when MODE = 011. ….