Type Alias stm32_hal2::pac::fmc::btr2::CLKDIV_W

pub type CLKDIV_W<'a, const O: u8> = FieldWriterRaw<'a, u32, BTR2_SPEC, u8, u8, Unsafe, 4, O>;

Field CLKDIV writer - Clock divide ratio (for FMC_CLK signal) These bits define the period of FMC_CLK clock output signal, expressed in number of KCK_FMC cycles: In asynchronous NOR Flash, SRAM or PSRAM accesses, this value is dont care. Note: Refer to Section20.6.5: Synchronous transactions for FMC_CLK divider ratio formula)

Aliased Type

struct CLKDIV_W<'a, const O: u8> { /* private fields */ }