Module stm32_hal2::pac::dmamux2::rgcr

source ·
Expand description

DMAMux - DMA request generator channel x control register

Structs§

  • Register RGCR%s reader
  • DMAMux - DMA request generator channel x control register
  • Register RGCR%s writer

Enums§

  • DMA request generator channel enable/disable
  • DMA request generator trigger event type selection Defines the trigger event on the selected DMA request trigger input
  • Interrupt enable at trigger event overrun
  • DMA request trigger input selected

Type Aliases§

  • Field GE reader - DMA request generator channel enable/disable
  • Field GE writer - DMA request generator channel enable/disable
  • Field GNBREQ reader - Number of DMA requests to generate Defines the number of DMA requests generated after a trigger event, then stop generating. The actual number of generated DMA requests is GNBREQ+1. Note: This field can only be written when GE bit is reset.
  • Field GNBREQ writer - Number of DMA requests to generate Defines the number of DMA requests generated after a trigger event, then stop generating. The actual number of generated DMA requests is GNBREQ+1. Note: This field can only be written when GE bit is reset.
  • Field GPOL reader - DMA request generator trigger event type selection Defines the trigger event on the selected DMA request trigger input
  • Field GPOL writer - DMA request generator trigger event type selection Defines the trigger event on the selected DMA request trigger input
  • Field OIE reader - Interrupt enable at trigger event overrun
  • Field OIE writer - Interrupt enable at trigger event overrun
  • Field SIG_ID reader - DMA request trigger input selected
  • Field SIG_ID writer - DMA request trigger input selected