Module stm32_hal2::pac::dma1::st
source · Expand description
Register block Stream cluster: S?CR, S?NDTR, S?M0AR, S?M1AR and S?FCR registers
Modules§
- stream x configuration register
- stream x FIFO control register
- stream x memory 0 address register
- stream x memory 1 address register
- stream x number of data register
- stream x peripheral address register
Type Aliases§
- CR register accessor: an alias for
Reg<CR_SPEC>
- FCR register accessor: an alias for
Reg<FCR_SPEC>
- M0AR register accessor: an alias for
Reg<M0AR_SPEC>
- M1AR register accessor: an alias for
Reg<M1AR_SPEC>
- NDTR register accessor: an alias for
Reg<NDTR_SPEC>
- PAR register accessor: an alias for
Reg<PAR_SPEC>