Enum sp1_core::stark::RiscvAir

pub enum RiscvAir<F: PrimeField32> {
    Program(ProgramChip),
    Cpu(CpuChip),
    Add(AddSubChip),
    Bitwise(BitwiseChip),
    Mul(MulChip),
    DivRem(DivRemChip),
    Lt(LtChip),
    ShiftLeft(ShiftLeft),
    ShiftRight(ShiftRightChip),
    ByteLookup(ByteChip<F>),
    MemoryInit(MemoryChip),
    MemoryFinal(MemoryChip),
    ProgramMemory(MemoryProgramChip),
    Sha256Extend(ShaExtendChip),
    Sha256Compress(ShaCompressChip),
    Ed25519Add(EdAddAssignChip<EdwardsCurve<Ed25519Parameters>>),
    Ed25519Decompress(EdDecompressChip<Ed25519Parameters>),
    K256Decompress(WeierstrassDecompressChip<SwCurve<Secp256k1Parameters>>),
    Secp256k1Add(WeierstrassAddAssignChip<SwCurve<Secp256k1Parameters>>),
    Secp256k1Double(WeierstrassDoubleAssignChip<SwCurve<Secp256k1Parameters>>),
    KeccakP(KeccakPermuteChip),
    Bn254Add(WeierstrassAddAssignChip<SwCurve<Bn254Parameters>>),
    Bn254Double(WeierstrassDoubleAssignChip<SwCurve<Bn254Parameters>>),
    Bls12381Add(WeierstrassAddAssignChip<SwCurve<Bls12381Parameters>>),
    Bls12381Double(WeierstrassDoubleAssignChip<SwCurve<Bls12381Parameters>>),
    Uint256Mul(Uint256MulChip),
    Bls12381Decompress(WeierstrassDecompressChip<SwCurve<Bls12381Parameters>>),
}

An AIR for encoding RISC-V execution.

This enum contains all the different AIRs that are used in the Sp1 RISC-V IOP. Each variant is a different AIR that is used to encode a different part of the RISC-V execution, and the different AIR variants have a joint lookup argument.

Variants

Program(ProgramChip)

An AIR that containts a preprocessed program table and a lookup for the instructions.

Cpu(CpuChip)

An AIR for the RISC-V CPU. Each row represents a cpu cycle.

Add(AddSubChip)

An AIR for the RISC-V Add and SUB instruction.

Bitwise(BitwiseChip)

An AIR for RISC-V Bitwise instructions.

Mul(MulChip)

An AIR for RISC-V Mul instruction.

DivRem(DivRemChip)

An AIR for RISC-V Div and Rem instructions.

Lt(LtChip)

An AIR for RISC-V Lt instruction.

ShiftLeft(ShiftLeft)

An AIR for RISC-V SLL instruction.

ShiftRight(ShiftRightChip)

An AIR for RISC-V SRL and SRA instruction.

ByteLookup(ByteChip<F>)

A lookup table for byte operations.

MemoryInit(MemoryChip)

A table for initializing the memory state.

MemoryFinal(MemoryChip)

A table for finalizing the memory state.

ProgramMemory(MemoryProgramChip)

A table for initializing the program memory.

Sha256Extend(ShaExtendChip)

A precompile for sha256 extend.

Sha256Compress(ShaCompressChip)

A precompile for sha256 compress.

Ed25519Add(EdAddAssignChip<EdwardsCurve<Ed25519Parameters>>)

A precompile for addition on the Elliptic curve ed25519.

Ed25519Decompress(EdDecompressChip<Ed25519Parameters>)

A precompile for decompressing a point on the Edwards curve ed25519.

K256Decompress(WeierstrassDecompressChip<SwCurve<Secp256k1Parameters>>)

A precompile for decompressing a point on the K256 curve.

Secp256k1Add(WeierstrassAddAssignChip<SwCurve<Secp256k1Parameters>>)

A precompile for addition on the Elliptic curve secp256k1.

Secp256k1Double(WeierstrassDoubleAssignChip<SwCurve<Secp256k1Parameters>>)

A precompile for doubling a point on the Elliptic curve secp256k1.

KeccakP(KeccakPermuteChip)

A precompile for the Keccak permutation.

Bn254Add(WeierstrassAddAssignChip<SwCurve<Bn254Parameters>>)

A precompile for addition on the Elliptic curve bn254.

Bn254Double(WeierstrassDoubleAssignChip<SwCurve<Bn254Parameters>>)

A precompile for doubling a point on the Elliptic curve bn254.

Bls12381Add(WeierstrassAddAssignChip<SwCurve<Bls12381Parameters>>)

A precompile for addition on the Elliptic curve bls12_381.

Bls12381Double(WeierstrassDoubleAssignChip<SwCurve<Bls12381Parameters>>)

A precompile for doubling a point on the Elliptic curve bls12_381.

Uint256Mul(Uint256MulChip)

A precompile for uint256 mul.

Bls12381Decompress(WeierstrassDecompressChip<SwCurve<Bls12381Parameters>>)

A precompile for decompressing a point on the BLS12-381 curve.

Implementations

impl<F: PrimeField32> RiscvAir<F>

pub fn machine<SC: StarkGenericConfig<Val = F>>( config: SC, ) -> StarkMachine<SC, Self>

pub fn get_all() -> Vec<Self>

Get all the different RISC-V AIRs.

Trait Implementations

impl<F: PrimeField32, AB: PairBuilder + SP1AirBuilder<F = F>> Air<AB> for RiscvAir<F>

fn eval(&self, builder: &mut AB)

impl<F: PrimeField32> BaseAir<F> for RiscvAir<F>

fn width(&self) -> usize

The number of columns (a.k.a. registers) in this AIR.

fn preprocessed_trace(&self) -> Option<RowMajorMatrix<F>>

impl<F: PrimeField32> Hash for RiscvAir<F>

fn hash<H: Hasher>(&self, state: &mut H)

Feeds this value into the given Hasher.

fn hash_slice<H>(data: &[Self], state: &mut H)

where H: Hasher, Self: Sized,

Feeds a slice of this type into the given Hasher.

impl<F: PrimeField32> MachineAir<F> for RiscvAir<F>

type Record = ExecutionRecord

The execution record containing events for producing the air trace.

type Program = Program

fn name(&self) -> String

A unique identifier for this AIR as part of a machine.

fn preprocessed_width(&self) -> usize

The width of the preprocessed trace.

fn generate_preprocessed_trace( &self, program: &Program, ) -> Option<RowMajorMatrix<F>>

Generate the preprocessed trace given a specific program.

fn generate_trace( &self, input: &ExecutionRecord, output: &mut ExecutionRecord, ) -> RowMajorMatrix<F>

Generate the trace for a given execution record.

fn generate_dependencies( &self, input: &ExecutionRecord, output: &mut ExecutionRecord, )

Generate the dependencies for a given execution record.

fn included(&self, shard: &Self::Record) -> bool

Whether this execution record contains events for this air.

impl<F: PrimeField32> PartialEq for RiscvAir<F>

fn eq(&self, other: &Self) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl<F: PrimeField32> Eq for RiscvAir<F>