Struct sp1_core::alu::add_sub::AddSubChip

pub struct AddSubChip;

A chip that implements addition for the opcode ADD and SUB.

SUB is basically an ADD with a re-arrangment of the operands and result. E.g. given the standard ALU op variable name and positioning of a = b OP c, a = b + c should be verified for ADD, and b = a + c (e.g. a = b - c) should be verified for SUB.

Trait Implementations

impl<AB> Air<AB> for AddSubChip

where AB: SP1AirBuilder,

fn eval(&self, builder: &mut AB)

impl<F> BaseAir<F> for AddSubChip

fn width(&self) -> usize

The number of columns (a.k.a. registers) in this AIR.

fn preprocessed_trace(&self) -> Option<DenseMatrix<F>>

impl Default for AddSubChip

fn default() -> AddSubChip

Returns the “default value” for a type.

impl<F: PrimeField> MachineAir<F> for AddSubChip

type Record = ExecutionRecord

The execution record containing events for producing the air trace.

type Program = Program

fn name(&self) -> String

A unique identifier for this AIR as part of a machine.

fn generate_trace( &self, input: &ExecutionRecord, _: &mut ExecutionRecord, ) -> RowMajorMatrix<F>

Generate the trace for a given execution record.

fn generate_dependencies(&self, input: &Self::Record, output: &mut Self::Record)

Generate the dependencies for a given execution record.

fn included(&self, shard: &Self::Record) -> bool

Whether this execution record contains events for this air.

fn preprocessed_width(&self) -> usize

The width of the preprocessed trace.

fn generate_preprocessed_trace( &self, _program: &Self::Program, ) -> Option<RowMajorMatrix<F>>

Generate the preprocessed trace given a specific program.