sp1_core_machine/control_flow/jalr/
columns.rs

1use crate::adapter::{register::i_type::ITypeReader, state::CPUState};
2use crate::{SupervisorMode, TrustMode, UserMode};
3use sp1_derive::AlignedBorrow;
4use std::mem::size_of;
5use struct_reflection::{StructReflection, StructReflectionHelper};
6
7use crate::operations::AddOperation;
8
9/// The number of main trace columns for `JalrChip` in Supervisor mode.
10pub const NUM_JALR_COLS_SUPERVISOR: usize = size_of::<JalrColumns<u8, SupervisorMode>>();
11/// The number of main trace columns for `JalrChip` in User mode.
12pub const NUM_JALR_COLS_USER: usize = size_of::<JalrColumns<u8, UserMode>>();
13
14#[derive(AlignedBorrow, Default, Debug, Clone, Copy, StructReflection)]
15#[repr(C)]
16pub struct JalrColumns<T, M: TrustMode> {
17    /// The current shard, timestamp, program counter of the CPU.
18    pub state: CPUState<T>,
19
20    /// The adapter to read program and register information.
21    pub adapter: ITypeReader<T>,
22
23    /// Whether or not the current row is a real row.
24    pub is_real: T,
25
26    /// Instance of `AddOperation` to handle addition logic in `JumpChip`.
27    pub add_operation: AddOperation<T>,
28
29    /// Computation of `pc + 4` if `op_a != X0`.
30    pub op_a_operation: AddOperation<T>,
31
32    /// The least significant bit of `op_b + op_c`.
33    pub lsb: T,
34
35    /// Adapter columns for trust mode specific data.
36    pub adapter_cols: M::AdapterCols<T>,
37}
sp1_core_machine/control_flow/jalr/columns.rs

sp1_core_machine/control_flow/jalr/
columns.rs
