sp1_core_machine/control_flow/jal/
mod.rs

1mod air;
2mod columns;
3mod trace;
4
5pub use columns::*;
6use slop_air::BaseAir;
7use std::marker::PhantomData;
8
9use crate::TrustMode;
10
11#[derive(Default)]
12pub struct JalChip<M: TrustMode> {
13    pub _phantom: PhantomData<M>,
14}
15
16impl<F, M: TrustMode> BaseAir<F> for JalChip<M> {
17    fn width(&self) -> usize {
18        if M::IS_TRUSTED {
19            NUM_JAL_COLS_SUPERVISOR
20        } else {
21            NUM_JAL_COLS_USER
22        }
23    }
24}
25
26// #[cfg(test)]
27// mod tests {
28//     use std::borrow::BorrowMut;
29
30//     use sp1_primitives::SP1Field;
31//     use slop_algebra::AbstractField;
32//     use slop_matrix::dense::RowMajorMatrix;
33//     use sp1_core_executor::{ExecutionRecord, Instruction, Opcode, Program};
34//     use sp1_hypercube::{
35//         air::MachineAir, koala_bear_poseidon2::SP1InnerPcs, chip_name, CpuProver,
36//         MachineProver, Val,
37//     };
38
39//     use crate::{
40//         control_flow::{JumpChip, JumpColumns},
41//         io::SP1Stdin,
42//         riscv::RiscvAir,
43//         utils::run_malicious_test,
44//     };
45
46//     // TODO: Re-enable when we LOGUP-GKR working.
47//     // #[test]
48//     // fn test_malicious_jumps() {
49//     //     let mut jump_instructions = [
50//     //         vec![Instruction::new(Opcode::JAL, 29, 8, 0, true, true)],
51//     //         vec![
52//     //             Instruction::new(Opcode::ADD, 28, 0, 8, false, true),
53//     //             Instruction::new(Opcode::JALR, 29, 28, 0, false, true),
54//     //         ],
55//     //     ];
56
57//     //     for instructions in jump_instructions.iter_mut() {
58//     //         instructions.extend(vec![
59//     //             Instruction::new(Opcode::ADD, 30, 0, 5, false, true),
60//     //             Instruction::new(Opcode::ADD, 28, 0, 5, false, true),
61//     //             Instruction::new(Opcode::ADD, 28, 0, 5, false, true),
62//     //         ]);
63//     //         let program = Program::new(instructions.to_vec(), 0, 0);
64//     //         let stdin = SP1Stdin::new();
65
66//     //         type P = CpuProver<SP1InnerPcs, RiscvAir<SP1Field>>;
67
68//     //         let malicious_trace_pv_generator =
69//     //             |prover: &P,
70//     //              record: &mut ExecutionRecord|
71//     //              -> Vec<(String, RowMajorMatrix<Val<SP1InnerPcs>>)> {
72//     //                 let mut traces = prover.generate_traces(record);
73//     //                 let jump_chip_name = chip_name!(JumpChip, SP1Field);
74//     //                 for (chip_name, trace) in traces.iter_mut() {
75//     //                     if *chip_name == jump_chip_name {
76//     //                         let first_row = trace.row_mut(0);
77//     //                         let first_row: &mut JumpColumns<SP1Field> =
78// first_row.borrow_mut();     //                         first_row.next_pc = 4.into();
79//     //                     }
80//     //                 }
81
82//     //                 traces
83//     //             };
84
85//     //         let result =
86//     //             run_malicious_test::<P>(program, stdin,
87// Box::new(malicious_trace_pv_generator));     //         assert!(result.is_err() &&
88// result.unwrap_err().is_local_cumulative_sum_failing());     //     }
89//     // }
90
91//     #[test]
92//     fn test_malicious_multiple_opcode_flags() {
93//         let instructions = vec![
94//             Instruction::new(Opcode::JAL, 29, 12, 0, true, true),
95//             Instruction::new(Opcode::ADD, 30, 0, 5, false, true),
96//             Instruction::new(Opcode::ADD, 28, 0, 5, false, true),
97//             Instruction::new(Opcode::ADD, 28, 0, 5, false, true),
98//         ];
99//         let program = Program::new(instructions, 0, 0);
100//         let stdin = SP1Stdin::new();
101
102//         type P = CpuProver<SP1InnerPcs, RiscvAir<SP1Field>>;
103
104//         let malicious_trace_pv_generator =
105//             |prover: &P,
106//              record: &mut ExecutionRecord|
107//              -> Vec<(String, RowMajorMatrix<Val<SP1InnerPcs>>)> {
108//                 // Modify the branch chip to have a row that has multiple opcode flags set.
109//                 let mut traces = prover.generate_traces(record);
110//                 let jump_chip_name = chip_name!(JumpChip, SP1Field);
111//                 for (chip_name, trace) in traces.iter_mut() {
112//                     if *chip_name == jump_chip_name {
113//                         let first_row = trace.row_mut(0);
114//                         let first_row: &mut JumpColumns<SP1Field> = first_row.borrow_mut();
115//                         assert!(first_row.is_jal == SP1Field::one());
116//                         first_row.is_jalr = SP1Field::one();
117//                     }
118//                 }
119//                 traces
120//             };
121
122//         let result =
123//             run_malicious_test::<P>(program, stdin, Box::new(malicious_trace_pv_generator));
124//         assert!(result.is_err() && result.unwrap_err().is_constraints_failing());
125//     }
126// }
sp1_core_machine/control_flow/jal/mod.rs

sp1_core_machine/control_flow/jal/
mod.rs
