Module solana_rbpf::ebpf [−][src]
Expand description
This module contains all the definitions related to eBPF, and some functions permitting to manipulate eBPF instructions.
The number of bytes in an instruction, the maximum number of instructions in a program, and also all operation codes are defined here as constants.
The structure for an instruction used by this crate, as well as the function to extract it from a program, is also defined in the module.
To learn more about these instructions, see the Linux kernel documentation: https://www.kernel.org/doc/Documentation/networking/filter.txt, or for a shorter version of the list of the operation codes: https://github.com/iovisor/bpf-docs/blob/master/eBPF.md
Structs
An eBPF instruction.
Constants
BPF opcode: add32 dst, imm
/// dst += imm
.
BPF opcode: add32 dst, src
/// dst += src
.
BPF opcode: add64 dst, imm
/// dst += imm
.
BPF opcode: add64 dst, src
/// dst += src
.
BPF opcode: and32 dst, imm
/// dst &= imm
.
BPF opcode: and32 dst, src
/// dst &= src
.
BPF opcode: and64 dst, imm
/// dst &= imm
.
BPF opcode: and64 dst, src
/// dst &= src
.
BPF opcode: arsh32 dst, imm
/// dst >>= imm (arithmetic)
.
BPF opcode: arsh32 dst, src
/// dst >>= src (arithmetic)
.
BPF opcode: arsh64 dst, imm
/// dst >>= imm (arithmetic)
.
BPF opcode: arsh64 dst, src
/// dst >>= src (arithmetic)
.
BPF opcode: be dst
/// dst = htobe<imm>(dst), with imm in {16, 32, 64}
.
BPF mode modifier: absolute load.
BPF ALU/ALU64 operation code: addition.
BPF operation class: 32 bits arithmetic operation.
BPF operation class: 64 bits arithmetic operation.
Mask to extract the arithmetic operation code from an instruction operation code.
BPF ALU/ALU64 operation code: and.
BPF ALU/ALU64 operation code: sign extending right shift.
BPF size modifier: byte (1 byte).
BPF JMP operation code: syscall function call.
Mask to extract the operation class from an operation code.
BPF ALU/ALU64 operation code: division.
BPF size modifier: double word (8 bytes).
BPF ALU/ALU64 operation code: endianness conversion.
BPF JMP operation code: return from program.
BPF size modifier: half-word (2 bytes).
BPF mode modifier: immediate value.
BPF mode modifier: indirect load.
BPF JMP operation code: jump.
BPF JMP operation code: jump if equal.
BPF JMP operation code: jump if greater or equal.
BPF JMP operation code: jump if greater than.
BPF JMP operation code: jump if lower or equal.
BPF JMP operation code: jump if lower than.
BPF operation class: jump.
BPF JMP operation code: jump if not equal.
BPF JMP operation code: jump if src
& reg
.
BPF JMP operation code: jump if greater or equal (signed).
BPF JMP operation code: jump if greater than (signed).
BPF JMP operation code: jump if lower or equal (signed).
BPF JMP operation code: jump if lower than (signed).
BPF source operand modifier: 32-bit immediate value.
BPF operation class: load from immediate.
BPF operation class: load from register.
BPF ALU/ALU64 operation code: left shift.
BPF mode modifier: load from / store to memory.
BPF ALU/ALU64 operation code: modulus.
BPF ALU/ALU64 operation code: move.
BPF ALU/ALU64 operation code: multiplication.
BPF ALU/ALU64 operation code: negation.
BPF ALU/ALU64 operation code: or.
BPF ALU/ALU64 operation code: right shift.
BPF operation class: store immediate.
BPF operation class: store value from register.
BPF ALU/ALU64 operation code: subtraction.
BPF size modifier: word (4 bytes).
BPF source operand modifier: src
register.
BPF mode modifier: exclusive add.
BPF ALU/ALU64 operation code: exclusive or.
BPF opcode: call imm
/// syscall function call to syscall with key imm
.
BPF opcode: tail call.
BPF opcode: div32 dst, imm
/// dst /= imm
.
BPF opcode: div32 dst, src
/// dst /= src
.
BPF opcode: div64 dst, imm
/// dst /= imm
.
BPF opcode: div64 dst, src
/// dst /= src
.
ELF dump instruction offset Instruction numbers typically start at 29 in the ELF dump, use this offset when reporting so that trace aligns with the dump.
BPF opcode: exit
/// return r0
.
First scratch register
Alignment of the memory regions in host address space in bytes
Size of an eBPF instructions, in bytes.
BPF opcode: ja +off
/// PC += off
.
BPF opcode: jeq dst, imm, +off
/// PC += off if dst == imm
.
BPF opcode: jeq dst, src, +off
/// PC += off if dst == src
.
BPF opcode: jge dst, imm, +off
/// PC += off if dst >= imm
.
BPF opcode: jge dst, src, +off
/// PC += off if dst >= src
.
BPF opcode: jgt dst, imm, +off
/// PC += off if dst > imm
.
BPF opcode: jgt dst, src, +off
/// PC += off if dst > src
.
BPF opcode: jle dst, imm, +off
/// PC += off if dst <= imm
.
BPF opcode: jle dst, src, +off
/// PC += off if dst <= src
.
BPF opcode: jlt dst, imm, +off
/// PC += off if dst < imm
.
BPF opcode: jlt dst, src, +off
/// PC += off if dst < src
.
BPF opcode: jne dst, imm, +off
/// PC += off if dst != imm
.
BPF opcode: jne dst, src, +off
/// PC += off if dst != src
.
BPF opcode: jset dst, imm, +off
/// PC += off if dst & imm
.
BPF opcode: jset dst, src, +off
/// PC += off if dst & src
.
BPF opcode: jsge dst, imm, +off
/// PC += off if dst >= imm (signed)
.
BPF opcode: jsge dst, src, +off
/// PC += off if dst >= src (signed)
.
BPF opcode: jsgt dst, imm, +off
/// PC += off if dst > imm (signed)
.
BPF opcode: jsgt dst, src, +off
/// PC += off if dst > src (signed)
.
BPF opcode: jsle dst, imm, +off
/// PC += off if dst <= imm (signed)
.
BPF opcode: jsle dst, src, +off
/// PC += off if dst <= src (signed)
.
BPF opcode: jslt dst, imm, +off
/// PC += off if dst < imm (signed)
.
BPF opcode: jslt dst, src, +off
/// PC += off if dst < src (signed)
.
BPF opcode: ldabsb src, dst, imm
.
BPF opcode: ldabsdw src, dst, imm
.
BPF opcode: ldabsh src, dst, imm
.
BPF opcode: ldabsw src, dst, imm
.
BPF opcode: ldxb dst, [src + off]
/// dst = (src + off) as u8
.
BPF opcode: lddw dst, imm
/// dst = imm
.
BPF opcode: ldxdw dst, [src + off]
/// dst = (src + off) as u64
.
BPF opcode: ldxh dst, [src + off]
/// dst = (src + off) as u16
.
BPF opcode: ldindb src, dst, imm
.
BPF opcode: ldinddw src, dst, imm
.
BPF opcode: ldindh src, dst, imm
.
BPF opcode: ldindw src, dst, imm
.
BPF opcode: ldxw dst, [src + off]
/// dst = (src + off) as u32
.
BPF opcode: le dst
/// dst = htole<imm>(dst), with imm in {16, 32, 64}
.
BPF opcode: lsh32 dst, imm
/// dst <<= imm
.
BPF opcode: lsh32 dst, src
/// dst <<= src
.
BPF opcode: lsh64 dst, imm
/// dst <<= imm
.
BPF opcode: lsh64 dst, src
/// dst <<= src
.
Start of the heap in the memory map
Start of the input buffers in the memory map
Start of the program bits (text and ro segments) in the memory map
Start of the stack in the memory map
BPF opcode: mod32 dst, imm
/// dst %= imm
.
BPF opcode: mod32 dst, src
/// dst %= src
.
BPF opcode: mod64 dst, imm
/// dst %= imm
.
BPF opcode: mod64 dst, src
/// dst %= src
.
BPF opcode: mov32 dst, imm
/// dst = imm
.
BPF opcode: mov32 dst, src
/// dst = src
.
BPF opcode: mov64 dst, imm
/// dst = imm
.
BPF opcode: mov64 dst, src
/// dst = src
.
BPF opcode: mul32 dst, imm
/// dst *= imm
.
BPF opcode: mul32 dst, src
/// dst *= src
.
BPF opcode: div64 dst, imm
/// dst /= imm
.
BPF opcode: div64 dst, src
/// dst /= src
.
BPF opcode: neg32 dst
/// dst = -dst
.
BPF opcode: neg64 dst, imm
/// dst = -dst
.
BPF opcode: or32 dst, imm
/// dst |= imm
.
BPF opcode: or32 dst, src
/// dst |= src
.
BPF opcode: or64 dst, imm
/// dst |= imm
.
BPF opcode: or64 dst, src
/// dst |= src
.
Maximum number of instructions in an eBPF program.
BPF opcode: rsh32 dst, imm
/// dst >>= imm
.
BPF opcode: rsh32 dst, src
/// dst >>= src
.
BPF opcode: rsh64 dst, imm
/// dst >>= imm
.
BPF opcode: rsh64 dst, src
/// dst >>= src
.
Number of scratch registers
Stack register
BPF opcode: stb [dst + off], imm
/// (dst + offset) as u8 = imm
.
BPF opcode: stxb [dst + off], src
/// (dst + offset) as u8 = src
.
BPF opcode: stdw [dst + off], imm
/// (dst + offset) as u64 = imm
.
BPF opcode: stxdw [dst + off], src
/// (dst + offset) as u64 = src
.
BPF opcode: stxxadddw [dst + off], src
.
BPF opcode: sth [dst + off], imm
/// (dst + offset) as u16 = imm
.
BPF opcode: stxh [dst + off], src
/// (dst + offset) as u16 = src
.
BPF opcode: stw [dst + off], imm
/// (dst + offset) as u32 = imm
.
BPF opcode: stxw [dst + off], src
/// (dst + offset) as u32 = src
.
BPF opcode: stxxaddw [dst + off], src
.
BPF opcode: sub32 dst, imm
/// dst -= imm
.
BPF opcode: sub32 dst, src
/// dst -= src
.
BPF opcode: sub64 dst, imm
/// dst -= imm
.
BPF opcode: sub64 dst, src
/// dst -= src
.
Upper half of a pointer is the region index, lower half the virtual address inside that region.
BPF opcode: xor32 dst, imm
/// dst ^= imm
.
BPF opcode: xor32 dst, src
/// dst ^= src
.
BPF opcode: xor64 dst, imm
/// dst ^= imm
.
BPF opcode: xor64 dst, src
/// dst ^= src
.
Functions
Merge the two halves of a LD_DW_IMM instruction
Get the instruction at idx
of an eBPF program. idx
is the index (number) of the
instruction (not a byte offset). The first instruction has index 0.
Same as get_insn
except not checked
Hash a symbol name