Struct s32k144::flexio::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub verid: VERID,
    pub param: PARAM,
    pub ctrl: CTRL,
    pub pin: PIN,
    pub shiftstat: SHIFTSTAT,
    pub shifterr: SHIFTERR,
    pub timstat: TIMSTAT,
    pub shiftsien: SHIFTSIEN,
    pub shifteien: SHIFTEIEN,
    pub timien: TIMIEN,
    pub shiftsden: SHIFTSDEN,
    pub shiftctl0: SHIFTCTL0,
    pub shiftctl1: SHIFTCTL1,
    pub shiftctl2: SHIFTCTL2,
    pub shiftctl3: SHIFTCTL3,
    pub shiftcfg0: SHIFTCFG0,
    pub shiftcfg1: SHIFTCFG1,
    pub shiftcfg2: SHIFTCFG2,
    pub shiftcfg3: SHIFTCFG3,
    pub shiftbuf0: SHIFTBUF0,
    pub shiftbuf1: SHIFTBUF1,
    pub shiftbuf2: SHIFTBUF2,
    pub shiftbuf3: SHIFTBUF3,
    pub shiftbufbis0: SHIFTBUFBIS0,
    pub shiftbufbis1: SHIFTBUFBIS1,
    pub shiftbufbis2: SHIFTBUFBIS2,
    pub shiftbufbis3: SHIFTBUFBIS3,
    pub shiftbufbys0: SHIFTBUFBYS0,
    pub shiftbufbys1: SHIFTBUFBYS1,
    pub shiftbufbys2: SHIFTBUFBYS2,
    pub shiftbufbys3: SHIFTBUFBYS3,
    pub shiftbufbbs0: SHIFTBUFBBS0,
    pub shiftbufbbs1: SHIFTBUFBBS1,
    pub shiftbufbbs2: SHIFTBUFBBS2,
    pub shiftbufbbs3: SHIFTBUFBBS3,
    pub timctl0: TIMCTL0,
    pub timctl1: TIMCTL1,
    pub timctl2: TIMCTL2,
    pub timctl3: TIMCTL3,
    pub timcfg0: TIMCFG0,
    pub timcfg1: TIMCFG1,
    pub timcfg2: TIMCFG2,
    pub timcfg3: TIMCFG3,
    pub timcmp0: TIMCMP0,
    pub timcmp1: TIMCMP1,
    pub timcmp2: TIMCMP2,
    pub timcmp3: TIMCMP3,
    // some fields omitted
}

Register block

Fields

verid: VERID

0x00 - Version ID Register

param: PARAM

0x04 - Parameter Register

ctrl: CTRL

0x08 - FlexIO Control Register

pin: PIN

0x0c - Pin State Register

shiftstat: SHIFTSTAT

0x10 - Shifter Status Register

shifterr: SHIFTERR

0x14 - Shifter Error Register

timstat: TIMSTAT

0x18 - Timer Status Register

shiftsien: SHIFTSIEN

0x20 - Shifter Status Interrupt Enable

shifteien: SHIFTEIEN

0x24 - Shifter Error Interrupt Enable

timien: TIMIEN

0x28 - Timer Interrupt Enable Register

shiftsden: SHIFTSDEN

0x30 - Shifter Status DMA Enable

shiftctl0: SHIFTCTL0

0x80 - Shifter Control N Register

shiftctl1: SHIFTCTL1

0x84 - Shifter Control N Register

shiftctl2: SHIFTCTL2

0x88 - Shifter Control N Register

shiftctl3: SHIFTCTL3

0x8c - Shifter Control N Register

shiftcfg0: SHIFTCFG0

0x100 - Shifter Configuration N Register

shiftcfg1: SHIFTCFG1

0x104 - Shifter Configuration N Register

shiftcfg2: SHIFTCFG2

0x108 - Shifter Configuration N Register

shiftcfg3: SHIFTCFG3

0x10c - Shifter Configuration N Register

shiftbuf0: SHIFTBUF0

0x200 - Shifter Buffer N Register

shiftbuf1: SHIFTBUF1

0x204 - Shifter Buffer N Register

shiftbuf2: SHIFTBUF2

0x208 - Shifter Buffer N Register

shiftbuf3: SHIFTBUF3

0x20c - Shifter Buffer N Register

shiftbufbis0: SHIFTBUFBIS0

0x280 - Shifter Buffer N Bit Swapped Register

shiftbufbis1: SHIFTBUFBIS1

0x284 - Shifter Buffer N Bit Swapped Register

shiftbufbis2: SHIFTBUFBIS2

0x288 - Shifter Buffer N Bit Swapped Register

shiftbufbis3: SHIFTBUFBIS3

0x28c - Shifter Buffer N Bit Swapped Register

shiftbufbys0: SHIFTBUFBYS0

0x300 - Shifter Buffer N Byte Swapped Register

shiftbufbys1: SHIFTBUFBYS1

0x304 - Shifter Buffer N Byte Swapped Register

shiftbufbys2: SHIFTBUFBYS2

0x308 - Shifter Buffer N Byte Swapped Register

shiftbufbys3: SHIFTBUFBYS3

0x30c - Shifter Buffer N Byte Swapped Register

shiftbufbbs0: SHIFTBUFBBS0

0x380 - Shifter Buffer N Bit Byte Swapped Register

shiftbufbbs1: SHIFTBUFBBS1

0x384 - Shifter Buffer N Bit Byte Swapped Register

shiftbufbbs2: SHIFTBUFBBS2

0x388 - Shifter Buffer N Bit Byte Swapped Register

shiftbufbbs3: SHIFTBUFBBS3

0x38c - Shifter Buffer N Bit Byte Swapped Register

timctl0: TIMCTL0

0x400 - Timer Control N Register

timctl1: TIMCTL1

0x404 - Timer Control N Register

timctl2: TIMCTL2

0x408 - Timer Control N Register

timctl3: TIMCTL3

0x40c - Timer Control N Register

timcfg0: TIMCFG0

0x480 - Timer Configuration N Register

timcfg1: TIMCFG1

0x484 - Timer Configuration N Register

timcfg2: TIMCFG2

0x488 - Timer Configuration N Register

timcfg3: TIMCFG3

0x48c - Timer Configuration N Register

timcmp0: TIMCMP0

0x500 - Timer Compare N Register

timcmp1: TIMCMP1

0x504 - Timer Compare N Register

timcmp2: TIMCMP2

0x508 - Timer Compare N Register

timcmp3: TIMCMP3

0x50c - Timer Compare N Register