Crate s32k142w_pac

Crate s32k142w_pac 

Source
Expand description

Peripheral access API for S32K142W microcontrollers (generated using svd2rust v0.21.0 ( ))

You can find an overview of the generated API here.

API features to be included in the next svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.

Re-exports§

pub use lpspi0 as lpspi1;
pub use lpspi0 as lpspi2;
pub use pdb0 as pdb1;
pub use ftm0 as ftm3;
pub use ftm1 as ftm2;
pub use adc0 as adc1;
pub use porta as portb;
pub use porta as portc;
pub use porta as portd;
pub use porta as porte;
pub use lpuart0 as lpuart1;
pub use lpuart0 as lpuart2;
pub use pta as ptb;
pub use pta as ptc;
pub use pta as ptd;
pub use pta as pte;

Modules§

adc0
ADC
aips
AIPS
can0
CAN
can1
CAN
cmp0
High-Speed Comparator (CMP), Voltage Reference (VREF) Digital-to-Analog Converter (DAC), and Analog Mux (ANMUX)
crc
CRC
dma
DMA
dmamux
DMAMUX
eim
EIM
erm
ERM
ewm
EWM
flexio
FLEXIO
ftfm
FTFM
ftm0
FTM
ftm1
FTM
generic
Common register and bit access and modify traits
lmem
LMEM
lpi2c0
LPI2C
lpit0
LPIT
lpspi0
LPSPI
lptmr0
LPTMR
lpuart0
LPUART
mcm
Core Platform Miscellaneous Control Module
mscm
MSCM
pcc
PCC
pdb0
Programmable Delay Block
pmc
PMC
porta
Pin Control and Interrupts
pta
GPIO
rcm
Reset Control Module
rtc
RTC
scg
System Clock Generator
sim
SIM
smc
System Mode Controller
trgmux
TRGMUX
wdog
WDOG

Structs§

ADC0
ADC
ADC1
ADC
AIPS
AIPS
CAN0
CAN
CAN1
CAN
CBP
Cache and branch predictor maintenance operations
CMP0
High-Speed Comparator (CMP), Voltage Reference (VREF) Digital-to-Analog Converter (DAC), and Analog Mux (ANMUX)
CPUID
CPUID
CRC
CRC
CorePeripherals
Core peripherals
DCB
Debug Control Block
DMA
DMA
DMAMUX
DMAMUX
DWT
Data Watchpoint and Trace unit
EIM
EIM
ERM
ERM
EWM
EWM
FLEXIO
FLEXIO
FPB
Flash Patch and Breakpoint unit
FPU
Floating Point Unit
FTFM
FTFM
FTM0
FTM
FTM1
FTM
FTM2
FTM
FTM3
FTM
ITM
Instrumentation Trace Macrocell
LMEM
LMEM
LPI2C0
LPI2C
LPIT0
LPIT
LPSPI0
LPSPI
LPSPI1
LPSPI
LPSPI2
LPSPI
LPTMR0
LPTMR
LPUART0
LPUART
LPUART1
LPUART
LPUART2
LPUART
MCM
Core Platform Miscellaneous Control Module
MPU
Memory Protection Unit
MSCM
MSCM
NVIC
Nested Vector Interrupt Controller
PCC
PCC
PDB0
Programmable Delay Block
PDB1
Programmable Delay Block
PMC
PMC
PORTA
Pin Control and Interrupts
PORTB
Pin Control and Interrupts
PORTC
Pin Control and Interrupts
PORTD
Pin Control and Interrupts
PORTE
Pin Control and Interrupts
PTA
GPIO
PTB
GPIO
PTC
GPIO
PTD
GPIO
PTE
GPIO
Peripherals
All the peripherals
RCM
Reset Control Module
RTC
RTC
SCB
System Control Block
SCG
System Clock Generator
SIM
SIM
SMC
System Mode Controller
SYST
SysTick: System Timer
TPIU
Trace Port Interface Unit
TRGMUX
TRGMUX
WDOG
WDOG

Enums§

Interrupt
Enumeration of all the interrupts.

Constants§

NVIC_PRIO_BITS
Number available in the NVIC for configuring priority