Module s2pac_ch32v103::adc
source · Expand description
Analog to digital converter
Modules§
- control register 1
- control register 2
- injected data register x
- injected data register x
- injected data register x
- injected data register x
- injected channel data offset register x
- injected channel data offset register x
- injected channel data offset register x
- injected channel data offset register x
- injected sequence register
- regular data register
- regular sequence register 1
- regular sequence register 2
- regular sequence register 3
- sample time register 1
- sample time register 2
- status register
- watchdog higher threshold register
- watchdog lower threshold register
Structs§
- Register block
Type Aliases§
- CTLR1 (rw) register accessor: control register 1
- CTLR2 (rw) register accessor: control register 2
- IDATAR1 (r) register accessor: injected data register x
- IDATAR2 (r) register accessor: injected data register x
- IDATAR3 (r) register accessor: injected data register x
- IDATAR4 (r) register accessor: injected data register x
- IOFR1 (rw) register accessor: injected channel data offset register x
- IOFR2 (rw) register accessor: injected channel data offset register x
- IOFR3 (rw) register accessor: injected channel data offset register x
- IOFR4 (rw) register accessor: injected channel data offset register x
- ISQR (rw) register accessor: injected sequence register
- RDATAR (r) register accessor: regular data register
- RSQR1 (rw) register accessor: regular sequence register 1
- RSQR2 (rw) register accessor: regular sequence register 2
- RSQR3 (rw) register accessor: regular sequence register 3
- SAMPTR1 (rw) register accessor: sample time register 1
- SAMPTR2 (rw) register accessor: sample time register 2
- STATR (rw) register accessor: status register
- WDHTR (rw) register accessor: watchdog higher threshold register
- WDLTR (rw) register accessor: watchdog lower threshold register