Module s2pac_ch32v103::rcc
source · Expand description
Reset and clock control
Modules§
- AHB Peripheral Clock enable register(RCC_AHBPCENR)
- AHB reset register(RCC_APHBRSTR)
- APB1 peripheral clock enable register (RCC_APB1PCENR)
- APB1 peripheral reset register(RCC_APB1PRSTR)
- APB2 peripheral clock enable register (RCC_APB2PCENR)
- APB2 peripheral reset register(RCC_APB2PRSTR)
- Backup domain control register(RCC_BDCTLR)
- Clock configuration register(RCC_CFGR0)
- Clock control register
- Clock interrupt register(RCC_INTR)
- Control/status register(RCC_RSTSCKR)
Structs§
- Register block
Type Aliases§
- AHBPCENR (rw) register accessor: AHB Peripheral Clock enable register(RCC_AHBPCENR)
- AHBRSTR (rw) register accessor: AHB reset register(RCC_APHBRSTR)
- APB1PCENR (rw) register accessor: APB1 peripheral clock enable register (RCC_APB1PCENR)
- APB1PRSTR (rw) register accessor: APB1 peripheral reset register(RCC_APB1PRSTR)
- APB2PCENR (rw) register accessor: APB2 peripheral clock enable register (RCC_APB2PCENR)
- APB2PRSTR (rw) register accessor: APB2 peripheral reset register(RCC_APB2PRSTR)
- BDCTLR (rw) register accessor: Backup domain control register(RCC_BDCTLR)
- CFGR0 (rw) register accessor: Clock configuration register(RCC_CFGR0)
- CTLR (rw) register accessor: Clock control register
- INTR (rw) register accessor: Clock interrupt register(RCC_INTR)
- RSTSCKR (rw) register accessor: Control/status register(RCC_RSTSCKR)