[−][src]Module rza1::scux

This is supported on crate feature scux only.

SCUX

Modules

bfssr0_2src0_0	`scux` BFSSR0_2SRC0_0
bfssr0_2src0_1	`scux` BFSSR0_2SRC0_1
bfssr1_2src0_0	`scux` BFSSR1_2SRC0_0
bfssr1_2src0_1	`scux` BFSSR1_2SRC0_1
devcr_ffd0_0	`scux` DEVCR_FFD0_0
devcr_ffd0_1	`scux` DEVCR_FFD0_1
devcr_ffd0_2	`scux` DEVCR_FFD0_2
devcr_ffd0_3	`scux` DEVCR_FFD0_3
devmr_ffd0_0	`scux` DEVMR_FFD0_0
devmr_ffd0_1	`scux` DEVMR_FFD0_1
devmr_ffd0_2	`scux` DEVMR_FFD0_2
devmr_ffd0_3	`scux` DEVMR_FFD0_3
dmacr_cim	`scux` DMACR_CIM
dmatd0_cim	`scux` DMATD0_CIM
dmatd1_cim	`scux` DMATD1_CIM
dmatd2_cim	`scux` DMATD2_CIM
dmatd3_cim	`scux` DMATD3_CIM
dmatu0_cim	`scux` DMATU0_CIM
dmatu1_cim	`scux` DMATU1_CIM
dmatu2_cim	`scux` DMATU2_CIM
dmatu3_cim	`scux` DMATU3_CIM
drqsr_ffd0_0	`scux` DRQSR_FFD0_0
drqsr_ffd0_1	`scux` DRQSR_FFD0_1
drqsr_ffd0_2	`scux` DRQSR_FFD0_2
drqsr_ffd0_3	`scux` DRQSR_FFD0_3
dvubr_dvu0_0	`scux` DVUBR_DVU0_0
dvubr_dvu0_1	`scux` DVUBR_DVU0_1
dvubr_dvu0_2	`scux` DVUBR_DVU0_2
dvubr_dvu0_3	`scux` DVUBR_DVU0_3
dvucr_dvu0_0	`scux` DVUCR_DVU0_0
dvucr_dvu0_1	`scux` DVUCR_DVU0_1
dvucr_dvu0_2	`scux` DVUCR_DVU0_2
dvucr_dvu0_3	`scux` DVUCR_DVU0_3
dvuer_dvu0_0	`scux` DVUER_DVU0_0
dvuer_dvu0_1	`scux` DVUER_DVU0_1
dvuer_dvu0_2	`scux` DVUER_DVU0_2
dvuer_dvu0_3	`scux` DVUER_DVU0_3
dvuir_dvu0_0	`scux` DVUIR_DVU0_0
dvuir_dvu0_1	`scux` DVUIR_DVU0_1
dvuir_dvu0_2	`scux` DVUIR_DVU0_2
dvuir_dvu0_3	`scux` DVUIR_DVU0_3
dvusr_dvu0_0	`scux` DVUSR_DVU0_0
dvusr_dvu0_1	`scux` DVUSR_DVU0_1
dvusr_dvu0_2	`scux` DVUSR_DVU0_2
dvusr_dvu0_3	`scux` DVUSR_DVU0_3
fdair_ffd0_0	`scux` FDAIR_FFD0_0
fdair_ffd0_1	`scux` FDAIR_FFD0_1
fdair_ffd0_2	`scux` FDAIR_FFD0_2
fdair_ffd0_3	`scux` FDAIR_FFD0_3
fdtsel0_cim	`scux` FDTSEL0_CIM
fdtsel1_cim	`scux` FDTSEL1_CIM
fdtsel2_cim	`scux` FDTSEL2_CIM
fdtsel3_cim	`scux` FDTSEL3_CIM
ffdbr_ffd0_0	`scux` FFDBR_FFD0_0
ffdbr_ffd0_1	`scux` FFDBR_FFD0_1
ffdbr_ffd0_2	`scux` FFDBR_FFD0_2
ffdbr_ffd0_3	`scux` FFDBR_FFD0_3
ffdir_ffd0_0	`scux` FFDIR_FFD0_0
ffdir_ffd0_1	`scux` FFDIR_FFD0_1
ffdir_ffd0_2	`scux` FFDIR_FFD0_2
ffdir_ffd0_3	`scux` FFDIR_FFD0_3
ffdpr_ffd0_0	`scux` FFDPR_FFD0_0
ffdpr_ffd0_1	`scux` FFDPR_FFD0_1
ffdpr_ffd0_2	`scux` FFDPR_FFD0_2
ffdpr_ffd0_3	`scux` FFDPR_FFD0_3
ffuir_ffu0_0	`scux` FFUIR_FFU0_0
ffuir_ffu0_1	`scux` FFUIR_FFU0_1
ffuir_ffu0_2	`scux` FFUIR_FFU0_2
ffuir_ffu0_3	`scux` FFUIR_FFU0_3
ffupr_ffu0_0	`scux` FFUPR_FFU0_0
ffupr_ffu0_1	`scux` FFUPR_FFU0_1
ffupr_ffu0_2	`scux` FFUPR_FFU0_2
ffupr_ffu0_3	`scux` FFUPR_FFU0_3
fuair_ffu0_0	`scux` FUAIR_FFU0_0
fuair_ffu0_1	`scux` FUAIR_FFU0_1
fuair_ffu0_2	`scux` FUAIR_FFU0_2
fuair_ffu0_3	`scux` FUAIR_FFU0_3
futsel0_cim	`scux` FUTSEL0_CIM
futsel1_cim	`scux` FUTSEL1_CIM
futsel2_cim	`scux` FUTSEL2_CIM
futsel3_cim	`scux` FUTSEL3_CIM
ifscr0_2src0_0	`scux` IFSCR0_2SRC0_0
ifscr0_2src0_1	`scux` IFSCR0_2SRC0_1
ifscr1_2src0_0	`scux` IFSCR1_2SRC0_0
ifscr1_2src0_1	`scux` IFSCR1_2SRC0_1
ifsvr0_2src0_0	`scux` IFSVR0_2SRC0_0
ifsvr0_2src0_1	`scux` IFSVR0_2SRC0_1
ifsvr1_2src0_0	`scux` IFSVR1_2SRC0_0
ifsvr1_2src0_1	`scux` IFSVR1_2SRC0_1
ipcir_ipc0_0	`scux` IPCIR_IPC0_0
ipcir_ipc0_1	`scux` IPCIR_IPC0_1
ipcir_ipc0_2	`scux` IPCIR_IPC0_2
ipcir_ipc0_3	`scux` IPCIR_IPC0_3
ipslr_ipc0_0	`scux` IPSLR_IPC0_0
ipslr_ipc0_1	`scux` IPSLR_IPC0_1
ipslr_ipc0_2	`scux` IPSLR_IPC0_2
ipslr_ipc0_3	`scux` IPSLR_IPC0_3
madir_mix0_0	`scux` MADIR_MIX0_0
mdbar_mix0_0	`scux` MDBAR_MIX0_0
mdbbr_mix0_0	`scux` MDBBR_MIX0_0
mdbcr_mix0_0	`scux` MDBCR_MIX0_0
mdbdr_mix0_0	`scux` MDBDR_MIX0_0
mdber_mix0_0	`scux` MDBER_MIX0_0
mixbr_mix0_0	`scux` MIXBR_MIX0_0
mixir_mix0_0	`scux` MIXIR_MIX0_0
mixmr_mix0_0	`scux` MIXMR_MIX0_0
mixrsel_cim	`scux` MIXRSEL_CIM
mixsr_mix0_0	`scux` MIXSR_MIX0_0
mnfsr0_2src0_0	`scux` MNFSR0_2SRC0_0
mnfsr0_2src0_1	`scux` MNFSR0_2SRC0_1
mnfsr1_2src0_0	`scux` MNFSR1_2SRC0_0
mnfsr1_2src0_1	`scux` MNFSR1_2SRC0_1
mvpdr_mix0_0	`scux` MVPDR_MIX0_0
opcir_opc0_0	`scux` OPCIR_OPC0_0
opcir_opc0_1	`scux` OPCIR_OPC0_1
opcir_opc0_2	`scux` OPCIR_OPC0_2
opcir_opc0_3	`scux` OPCIR_OPC0_3
opslr_opc0_0	`scux` OPSLR_OPC0_0
opslr_opc0_1	`scux` OPSLR_OPC0_1
opslr_opc0_2	`scux` OPSLR_OPC0_2
opslr_opc0_3	`scux` OPSLR_OPC0_3
sadir0_2src0_0	`scux` SADIR0_2SRC0_0
sadir0_2src0_1	`scux` SADIR0_2SRC0_1
sadir1_2src0_0	`scux` SADIR1_2SRC0_0
sadir1_2src0_1	`scux` SADIR1_2SRC0_1
sc2sr0_2src0_0	`scux` SC2SR0_2SRC0_0
sc2sr0_2src0_1	`scux` SC2SR0_2SRC0_1
sc2sr1_2src0_0	`scux` SC2SR1_2SRC0_0
sc2sr1_2src0_1	`scux` SC2SR1_2SRC0_1
sevcr0_2src0_0	`scux` SEVCR0_2SRC0_0
sevcr0_2src0_1	`scux` SEVCR0_2SRC0_1
sevcr1_2src0_0	`scux` SEVCR1_2SRC0_0
sevcr1_2src0_1	`scux` SEVCR1_2SRC0_1
sevmr0_2src0_0	`scux` SEVMR0_2SRC0_0
sevmr0_2src0_1	`scux` SEVMR0_2SRC0_1
sevmr1_2src0_0	`scux` SEVMR1_2SRC0_0
sevmr1_2src0_1	`scux` SEVMR1_2SRC0_1
srcbr0_2src0_0	`scux` SRCBR0_2SRC0_0
srcbr0_2src0_1	`scux` SRCBR0_2SRC0_1
srcbr1_2src0_0	`scux` SRCBR1_2SRC0_0
srcbr1_2src0_1	`scux` SRCBR1_2SRC0_1
srccr0_2src0_0	`scux` SRCCR0_2SRC0_0
srccr0_2src0_1	`scux` SRCCR0_2SRC0_1
srccr1_2src0_0	`scux` SRCCR1_2SRC0_0
srccr1_2src0_1	`scux` SRCCR1_2SRC0_1
srcir0_2src0_0	`scux` SRCIR0_2SRC0_0
srcir0_2src0_1	`scux` SRCIR0_2SRC0_1
srcir1_2src0_0	`scux` SRCIR1_2SRC0_0
srcir1_2src0_1	`scux` SRCIR1_2SRC0_1
srcirr_2src0_0	`scux` SRCIRR_2SRC0_0
srcirr_2src0_1	`scux` SRCIRR_2SRC0_1
srcrsel0_cim	`scux` SRCRSEL0_CIM
srcrsel1_cim	`scux` SRCRSEL1_CIM
srcrsel2_cim	`scux` SRCRSEL2_CIM
srcrsel3_cim	`scux` SRCRSEL3_CIM
ssictrl_cim	`scux` SSICTRL_CIM
ssipmd_cim	`scux` SSIPMD_CIM
ssirsel_cim	`scux` SSIRSEL_CIM
swrsr_cim	`scux` SWRSR_CIM
uevcr_ffu0_0	`scux` UEVCR_FFU0_0
uevcr_ffu0_1	`scux` UEVCR_FFU0_1
uevcr_ffu0_2	`scux` UEVCR_FFU0_2
uevcr_ffu0_3	`scux` UEVCR_FFU0_3
uevmr_ffu0_0	`scux` UEVMR_FFU0_0
uevmr_ffu0_1	`scux` UEVMR_FFU0_1
uevmr_ffu0_2	`scux` UEVMR_FFU0_2
uevmr_ffu0_3	`scux` UEVMR_FFU0_3
urqsr_ffu0_0	`scux` URQSR_FFU0_0
urqsr_ffu0_1	`scux` URQSR_FFU0_1
urqsr_ffu0_2	`scux` URQSR_FFU0_2
urqsr_ffu0_3	`scux` URQSR_FFU0_3
vadir_dvu0_0	`scux` VADIR_DVU0_0
vadir_dvu0_1	`scux` VADIR_DVU0_1
vadir_dvu0_2	`scux` VADIR_DVU0_2
vadir_dvu0_3	`scux` VADIR_DVU0_3
vevcr_dvu0_0	`scux` VEVCR_DVU0_0
vevcr_dvu0_1	`scux` VEVCR_DVU0_1
vevcr_dvu0_2	`scux` VEVCR_DVU0_2
vevcr_dvu0_3	`scux` VEVCR_DVU0_3
vevmr_dvu0_0	`scux` VEVMR_DVU0_0
vevmr_dvu0_1	`scux` VEVMR_DVU0_1
vevmr_dvu0_2	`scux` VEVMR_DVU0_2
vevmr_dvu0_3	`scux` VEVMR_DVU0_3
vol0r_dvu0_0	`scux` VOL0R_DVU0_0
vol0r_dvu0_1	`scux` VOL0R_DVU0_1
vol0r_dvu0_2	`scux` VOL0R_DVU0_2
vol0r_dvu0_3	`scux` VOL0R_DVU0_3
vol1r_dvu0_0	`scux` VOL1R_DVU0_0
vol1r_dvu0_1	`scux` VOL1R_DVU0_1
vol1r_dvu0_2	`scux` VOL1R_DVU0_2
vol1r_dvu0_3	`scux` VOL1R_DVU0_3
vol2r_dvu0_0	`scux` VOL2R_DVU0_0
vol2r_dvu0_1	`scux` VOL2R_DVU0_1
vol2r_dvu0_2	`scux` VOL2R_DVU0_2
vol2r_dvu0_3	`scux` VOL2R_DVU0_3
vol3r_dvu0_0	`scux` VOL3R_DVU0_0
vol3r_dvu0_1	`scux` VOL3R_DVU0_1
vol3r_dvu0_2	`scux` VOL3R_DVU0_2
vol3r_dvu0_3	`scux` VOL3R_DVU0_3
vol4r_dvu0_0	`scux` VOL4R_DVU0_0
vol4r_dvu0_1	`scux` VOL4R_DVU0_1
vol4r_dvu0_2	`scux` VOL4R_DVU0_2
vol4r_dvu0_3	`scux` VOL4R_DVU0_3
vol5r_dvu0_0	`scux` VOL5R_DVU0_0
vol5r_dvu0_1	`scux` VOL5R_DVU0_1
vol5r_dvu0_2	`scux` VOL5R_DVU0_2
vol5r_dvu0_3	`scux` VOL5R_DVU0_3
vol6r_dvu0_0	`scux` VOL6R_DVU0_0
vol6r_dvu0_1	`scux` VOL6R_DVU0_1
vol6r_dvu0_2	`scux` VOL6R_DVU0_2
vol6r_dvu0_3	`scux` VOL6R_DVU0_3
vol7r_dvu0_0	`scux` VOL7R_DVU0_0
vol7r_dvu0_1	`scux` VOL7R_DVU0_1
vol7r_dvu0_2	`scux` VOL7R_DVU0_2
vol7r_dvu0_3	`scux` VOL7R_DVU0_3
vrctr_dvu0_0	`scux` VRCTR_DVU0_0
vrctr_dvu0_1	`scux` VRCTR_DVU0_1
vrctr_dvu0_2	`scux` VRCTR_DVU0_2
vrctr_dvu0_3	`scux` VRCTR_DVU0_3
vrdbr_dvu0_0	`scux` VRDBR_DVU0_0
vrdbr_dvu0_1	`scux` VRDBR_DVU0_1
vrdbr_dvu0_2	`scux` VRDBR_DVU0_2
vrdbr_dvu0_3	`scux` VRDBR_DVU0_3
vrpdr_dvu0_0	`scux` VRPDR_DVU0_0
vrpdr_dvu0_1	`scux` VRPDR_DVU0_1
vrpdr_dvu0_2	`scux` VRPDR_DVU0_2
vrpdr_dvu0_3	`scux` VRPDR_DVU0_3
vrwtr_dvu0_0	`scux` VRWTR_DVU0_0
vrwtr_dvu0_1	`scux` VRWTR_DVU0_1
vrwtr_dvu0_2	`scux` VRWTR_DVU0_2
vrwtr_dvu0_3	`scux` VRWTR_DVU0_3
watsr0_2src0_0	`scux` WATSR0_2SRC0_0
watsr0_2src0_1	`scux` WATSR0_2SRC0_1
watsr1_2src0_0	`scux` WATSR1_2SRC0_0
watsr1_2src0_1	`scux` WATSR1_2SRC0_1
zcmcr_dvu0_0	`scux` ZCMCR_DVU0_0
zcmcr_dvu0_1	`scux` ZCMCR_DVU0_1
zcmcr_dvu0_2	`scux` ZCMCR_DVU0_2
zcmcr_dvu0_3	`scux` ZCMCR_DVU0_3

Structs

BFSSR0_2SRC0_0	`scux` BFSSR0_2SRC0_0
BFSSR0_2SRC0_1	`scux` BFSSR0_2SRC0_1
BFSSR1_2SRC0_0	`scux` BFSSR1_2SRC0_0
BFSSR1_2SRC0_1	`scux` BFSSR1_2SRC0_1
DEVCR_FFD0_0	`scux` DEVCR_FFD0_0
DEVCR_FFD0_1	`scux` DEVCR_FFD0_1
DEVCR_FFD0_2	`scux` DEVCR_FFD0_2
DEVCR_FFD0_3	`scux` DEVCR_FFD0_3
DEVMR_FFD0_0	`scux` DEVMR_FFD0_0
DEVMR_FFD0_1	`scux` DEVMR_FFD0_1
DEVMR_FFD0_2	`scux` DEVMR_FFD0_2
DEVMR_FFD0_3	`scux` DEVMR_FFD0_3
DMACR_CIM	`scux` DMACR_CIM
DMATD0_CIM	`scux` DMATD0_CIM
DMATD1_CIM	`scux` DMATD1_CIM
DMATD2_CIM	`scux` DMATD2_CIM
DMATD3_CIM	`scux` DMATD3_CIM
DMATU0_CIM	`scux` DMATU0_CIM
DMATU1_CIM	`scux` DMATU1_CIM
DMATU2_CIM	`scux` DMATU2_CIM
DMATU3_CIM	`scux` DMATU3_CIM
DRQSR_FFD0_0	`scux` DRQSR_FFD0_0
DRQSR_FFD0_1	`scux` DRQSR_FFD0_1
DRQSR_FFD0_2	`scux` DRQSR_FFD0_2
DRQSR_FFD0_3	`scux` DRQSR_FFD0_3
DVUBR_DVU0_0	`scux` DVUBR_DVU0_0
DVUBR_DVU0_1	`scux` DVUBR_DVU0_1
DVUBR_DVU0_2	`scux` DVUBR_DVU0_2
DVUBR_DVU0_3	`scux` DVUBR_DVU0_3
DVUCR_DVU0_0	`scux` DVUCR_DVU0_0
DVUCR_DVU0_1	`scux` DVUCR_DVU0_1
DVUCR_DVU0_2	`scux` DVUCR_DVU0_2
DVUCR_DVU0_3	`scux` DVUCR_DVU0_3
DVUER_DVU0_0	`scux` DVUER_DVU0_0
DVUER_DVU0_1	`scux` DVUER_DVU0_1
DVUER_DVU0_2	`scux` DVUER_DVU0_2
DVUER_DVU0_3	`scux` DVUER_DVU0_3
DVUIR_DVU0_0	`scux` DVUIR_DVU0_0
DVUIR_DVU0_1	`scux` DVUIR_DVU0_1
DVUIR_DVU0_2	`scux` DVUIR_DVU0_2
DVUIR_DVU0_3	`scux` DVUIR_DVU0_3
DVUSR_DVU0_0	`scux` DVUSR_DVU0_0
DVUSR_DVU0_1	`scux` DVUSR_DVU0_1
DVUSR_DVU0_2	`scux` DVUSR_DVU0_2
DVUSR_DVU0_3	`scux` DVUSR_DVU0_3
FDAIR_FFD0_0	`scux` FDAIR_FFD0_0
FDAIR_FFD0_1	`scux` FDAIR_FFD0_1
FDAIR_FFD0_2	`scux` FDAIR_FFD0_2
FDAIR_FFD0_3	`scux` FDAIR_FFD0_3
FDTSEL0_CIM	`scux` FDTSEL0_CIM
FDTSEL1_CIM	`scux` FDTSEL1_CIM
FDTSEL2_CIM	`scux` FDTSEL2_CIM
FDTSEL3_CIM	`scux` FDTSEL3_CIM
FFDBR_FFD0_0	`scux` FFDBR_FFD0_0
FFDBR_FFD0_1	`scux` FFDBR_FFD0_1
FFDBR_FFD0_2	`scux` FFDBR_FFD0_2
FFDBR_FFD0_3	`scux` FFDBR_FFD0_3
FFDIR_FFD0_0	`scux` FFDIR_FFD0_0
FFDIR_FFD0_1	`scux` FFDIR_FFD0_1
FFDIR_FFD0_2	`scux` FFDIR_FFD0_2
FFDIR_FFD0_3	`scux` FFDIR_FFD0_3
FFDPR_FFD0_0	`scux` FFDPR_FFD0_0
FFDPR_FFD0_1	`scux` FFDPR_FFD0_1
FFDPR_FFD0_2	`scux` FFDPR_FFD0_2
FFDPR_FFD0_3	`scux` FFDPR_FFD0_3
FFUIR_FFU0_0	`scux` FFUIR_FFU0_0
FFUIR_FFU0_1	`scux` FFUIR_FFU0_1
FFUIR_FFU0_2	`scux` FFUIR_FFU0_2
FFUIR_FFU0_3	`scux` FFUIR_FFU0_3
FFUPR_FFU0_0	`scux` FFUPR_FFU0_0
FFUPR_FFU0_1	`scux` FFUPR_FFU0_1
FFUPR_FFU0_2	`scux` FFUPR_FFU0_2
FFUPR_FFU0_3	`scux` FFUPR_FFU0_3
FUAIR_FFU0_0	`scux` FUAIR_FFU0_0
FUAIR_FFU0_1	`scux` FUAIR_FFU0_1
FUAIR_FFU0_2	`scux` FUAIR_FFU0_2
FUAIR_FFU0_3	`scux` FUAIR_FFU0_3
FUTSEL0_CIM	`scux` FUTSEL0_CIM
FUTSEL1_CIM	`scux` FUTSEL1_CIM
FUTSEL2_CIM	`scux` FUTSEL2_CIM
FUTSEL3_CIM	`scux` FUTSEL3_CIM
IFSCR0_2SRC0_0	`scux` IFSCR0_2SRC0_0
IFSCR0_2SRC0_1	`scux` IFSCR0_2SRC0_1
IFSCR1_2SRC0_0	`scux` IFSCR1_2SRC0_0
IFSCR1_2SRC0_1	`scux` IFSCR1_2SRC0_1
IFSVR0_2SRC0_0	`scux` IFSVR0_2SRC0_0
IFSVR0_2SRC0_1	`scux` IFSVR0_2SRC0_1
IFSVR1_2SRC0_0	`scux` IFSVR1_2SRC0_0
IFSVR1_2SRC0_1	`scux` IFSVR1_2SRC0_1
IPCIR_IPC0_0	`scux` IPCIR_IPC0_0
IPCIR_IPC0_1	`scux` IPCIR_IPC0_1
IPCIR_IPC0_2	`scux` IPCIR_IPC0_2
IPCIR_IPC0_3	`scux` IPCIR_IPC0_3
IPSLR_IPC0_0	`scux` IPSLR_IPC0_0
IPSLR_IPC0_1	`scux` IPSLR_IPC0_1
IPSLR_IPC0_2	`scux` IPSLR_IPC0_2
IPSLR_IPC0_3	`scux` IPSLR_IPC0_3
MADIR_MIX0_0	`scux` MADIR_MIX0_0
MDBAR_MIX0_0	`scux` MDBAR_MIX0_0
MDBBR_MIX0_0	`scux` MDBBR_MIX0_0
MDBCR_MIX0_0	`scux` MDBCR_MIX0_0
MDBDR_MIX0_0	`scux` MDBDR_MIX0_0
MDBER_MIX0_0	`scux` MDBER_MIX0_0
MIXBR_MIX0_0	`scux` MIXBR_MIX0_0
MIXIR_MIX0_0	`scux` MIXIR_MIX0_0
MIXMR_MIX0_0	`scux` MIXMR_MIX0_0
MIXRSEL_CIM	`scux` MIXRSEL_CIM
MIXSR_MIX0_0	`scux` MIXSR_MIX0_0
MNFSR0_2SRC0_0	`scux` MNFSR0_2SRC0_0
MNFSR0_2SRC0_1	`scux` MNFSR0_2SRC0_1
MNFSR1_2SRC0_0	`scux` MNFSR1_2SRC0_0
MNFSR1_2SRC0_1	`scux` MNFSR1_2SRC0_1
MVPDR_MIX0_0	`scux` MVPDR_MIX0_0
OPCIR_OPC0_0	`scux` OPCIR_OPC0_0
OPCIR_OPC0_1	`scux` OPCIR_OPC0_1
OPCIR_OPC0_2	`scux` OPCIR_OPC0_2
OPCIR_OPC0_3	`scux` OPCIR_OPC0_3
OPSLR_OPC0_0	`scux` OPSLR_OPC0_0
OPSLR_OPC0_1	`scux` OPSLR_OPC0_1
OPSLR_OPC0_2	`scux` OPSLR_OPC0_2
OPSLR_OPC0_3	`scux` OPSLR_OPC0_3
RegisterBlock	`scux` Register block
SADIR0_2SRC0_0	`scux` SADIR0_2SRC0_0
SADIR0_2SRC0_1	`scux` SADIR0_2SRC0_1
SADIR1_2SRC0_0	`scux` SADIR1_2SRC0_0
SADIR1_2SRC0_1	`scux` SADIR1_2SRC0_1
SC2SR0_2SRC0_0	`scux` SC2SR0_2SRC0_0
SC2SR0_2SRC0_1	`scux` SC2SR0_2SRC0_1
SC2SR1_2SRC0_0	`scux` SC2SR1_2SRC0_0
SC2SR1_2SRC0_1	`scux` SC2SR1_2SRC0_1
SEVCR0_2SRC0_0	`scux` SEVCR0_2SRC0_0
SEVCR0_2SRC0_1	`scux` SEVCR0_2SRC0_1
SEVCR1_2SRC0_0	`scux` SEVCR1_2SRC0_0
SEVCR1_2SRC0_1	`scux` SEVCR1_2SRC0_1
SEVMR0_2SRC0_0	`scux` SEVMR0_2SRC0_0
SEVMR0_2SRC0_1	`scux` SEVMR0_2SRC0_1
SEVMR1_2SRC0_0	`scux` SEVMR1_2SRC0_0
SEVMR1_2SRC0_1	`scux` SEVMR1_2SRC0_1
SRCBR0_2SRC0_0	`scux` SRCBR0_2SRC0_0
SRCBR0_2SRC0_1	`scux` SRCBR0_2SRC0_1
SRCBR1_2SRC0_0	`scux` SRCBR1_2SRC0_0
SRCBR1_2SRC0_1	`scux` SRCBR1_2SRC0_1
SRCCR0_2SRC0_0	`scux` SRCCR0_2SRC0_0
SRCCR0_2SRC0_1	`scux` SRCCR0_2SRC0_1
SRCCR1_2SRC0_0	`scux` SRCCR1_2SRC0_0
SRCCR1_2SRC0_1	`scux` SRCCR1_2SRC0_1
SRCIR0_2SRC0_0	`scux` SRCIR0_2SRC0_0
SRCIR0_2SRC0_1	`scux` SRCIR0_2SRC0_1
SRCIR1_2SRC0_0	`scux` SRCIR1_2SRC0_0
SRCIR1_2SRC0_1	`scux` SRCIR1_2SRC0_1
SRCIRR_2SRC0_0	`scux` SRCIRR_2SRC0_0
SRCIRR_2SRC0_1	`scux` SRCIRR_2SRC0_1
SRCRSEL0_CIM	`scux` SRCRSEL0_CIM
SRCRSEL1_CIM	`scux` SRCRSEL1_CIM
SRCRSEL2_CIM	`scux` SRCRSEL2_CIM
SRCRSEL3_CIM	`scux` SRCRSEL3_CIM
SSICTRL_CIM	`scux` SSICTRL_CIM
SSIPMD_CIM	`scux` SSIPMD_CIM
SSIRSEL_CIM	`scux` SSIRSEL_CIM
SWRSR_CIM	`scux` SWRSR_CIM
UEVCR_FFU0_0	`scux` UEVCR_FFU0_0
UEVCR_FFU0_1	`scux` UEVCR_FFU0_1
UEVCR_FFU0_2	`scux` UEVCR_FFU0_2
UEVCR_FFU0_3	`scux` UEVCR_FFU0_3
UEVMR_FFU0_0	`scux` UEVMR_FFU0_0
UEVMR_FFU0_1	`scux` UEVMR_FFU0_1
UEVMR_FFU0_2	`scux` UEVMR_FFU0_2
UEVMR_FFU0_3	`scux` UEVMR_FFU0_3
URQSR_FFU0_0	`scux` URQSR_FFU0_0
URQSR_FFU0_1	`scux` URQSR_FFU0_1
URQSR_FFU0_2	`scux` URQSR_FFU0_2
URQSR_FFU0_3	`scux` URQSR_FFU0_3
VADIR_DVU0_0	`scux` VADIR_DVU0_0
VADIR_DVU0_1	`scux` VADIR_DVU0_1
VADIR_DVU0_2	`scux` VADIR_DVU0_2
VADIR_DVU0_3	`scux` VADIR_DVU0_3
VEVCR_DVU0_0	`scux` VEVCR_DVU0_0
VEVCR_DVU0_1	`scux` VEVCR_DVU0_1
VEVCR_DVU0_2	`scux` VEVCR_DVU0_2
VEVCR_DVU0_3	`scux` VEVCR_DVU0_3
VEVMR_DVU0_0	`scux` VEVMR_DVU0_0
VEVMR_DVU0_1	`scux` VEVMR_DVU0_1
VEVMR_DVU0_2	`scux` VEVMR_DVU0_2
VEVMR_DVU0_3	`scux` VEVMR_DVU0_3
VOL0R_DVU0_0	`scux` VOL0R_DVU0_0
VOL0R_DVU0_1	`scux` VOL0R_DVU0_1
VOL0R_DVU0_2	`scux` VOL0R_DVU0_2
VOL0R_DVU0_3	`scux` VOL0R_DVU0_3
VOL1R_DVU0_0	`scux` VOL1R_DVU0_0
VOL1R_DVU0_1	`scux` VOL1R_DVU0_1
VOL1R_DVU0_2	`scux` VOL1R_DVU0_2
VOL1R_DVU0_3	`scux` VOL1R_DVU0_3
VOL2R_DVU0_0	`scux` VOL2R_DVU0_0
VOL2R_DVU0_1	`scux` VOL2R_DVU0_1
VOL2R_DVU0_2	`scux` VOL2R_DVU0_2
VOL2R_DVU0_3	`scux` VOL2R_DVU0_3
VOL3R_DVU0_0	`scux` VOL3R_DVU0_0
VOL3R_DVU0_1	`scux` VOL3R_DVU0_1
VOL3R_DVU0_2	`scux` VOL3R_DVU0_2
VOL3R_DVU0_3	`scux` VOL3R_DVU0_3
VOL4R_DVU0_0	`scux` VOL4R_DVU0_0
VOL4R_DVU0_1	`scux` VOL4R_DVU0_1
VOL4R_DVU0_2	`scux` VOL4R_DVU0_2
VOL4R_DVU0_3	`scux` VOL4R_DVU0_3
VOL5R_DVU0_0	`scux` VOL5R_DVU0_0
VOL5R_DVU0_1	`scux` VOL5R_DVU0_1
VOL5R_DVU0_2	`scux` VOL5R_DVU0_2
VOL5R_DVU0_3	`scux` VOL5R_DVU0_3
VOL6R_DVU0_0	`scux` VOL6R_DVU0_0
VOL6R_DVU0_1	`scux` VOL6R_DVU0_1
VOL6R_DVU0_2	`scux` VOL6R_DVU0_2
VOL6R_DVU0_3	`scux` VOL6R_DVU0_3
VOL7R_DVU0_0	`scux` VOL7R_DVU0_0
VOL7R_DVU0_1	`scux` VOL7R_DVU0_1
VOL7R_DVU0_2	`scux` VOL7R_DVU0_2
VOL7R_DVU0_3	`scux` VOL7R_DVU0_3
VRCTR_DVU0_0	`scux` VRCTR_DVU0_0
VRCTR_DVU0_1	`scux` VRCTR_DVU0_1
VRCTR_DVU0_2	`scux` VRCTR_DVU0_2
VRCTR_DVU0_3	`scux` VRCTR_DVU0_3
VRDBR_DVU0_0	`scux` VRDBR_DVU0_0
VRDBR_DVU0_1	`scux` VRDBR_DVU0_1
VRDBR_DVU0_2	`scux` VRDBR_DVU0_2
VRDBR_DVU0_3	`scux` VRDBR_DVU0_3
VRPDR_DVU0_0	`scux` VRPDR_DVU0_0
VRPDR_DVU0_1	`scux` VRPDR_DVU0_1
VRPDR_DVU0_2	`scux` VRPDR_DVU0_2
VRPDR_DVU0_3	`scux` VRPDR_DVU0_3
VRWTR_DVU0_0	`scux` VRWTR_DVU0_0
VRWTR_DVU0_1	`scux` VRWTR_DVU0_1
VRWTR_DVU0_2	`scux` VRWTR_DVU0_2
VRWTR_DVU0_3	`scux` VRWTR_DVU0_3
WATSR0_2SRC0_0	`scux` WATSR0_2SRC0_0
WATSR0_2SRC0_1	`scux` WATSR0_2SRC0_1
WATSR1_2SRC0_0	`scux` WATSR1_2SRC0_0
WATSR1_2SRC0_1	`scux` WATSR1_2SRC0_1
ZCMCR_DVU0_0	`scux` ZCMCR_DVU0_0
ZCMCR_DVU0_1	`scux` ZCMCR_DVU0_1
ZCMCR_DVU0_2	`scux` ZCMCR_DVU0_2
ZCMCR_DVU0_3	`scux` ZCMCR_DVU0_3