rvv_asm!() { /* proc-macro */ }
Expand description

Convert RISC-V Vector Extension to .byte 0x00, 0x11, 0xaa, 0xbb format asm instructions.


Since currently don’t find a way to tell llvm don’t reorder instructions, please make sure all rvv_asm! macros not inlined, the typical way is putting all rvv_asm! in #[inline(never)] function.


Compile will fail due to target not supported on develop/CI machine.

let lo: i64;
unsafe {
        "vsetvl x5, s3, t6",
        "1: vle256.v v3, (a0), vm",
        "li {lo}, 4",
        lo = out(reg) lo,