[][src]Crate rv32m1_ri5cy_pac

Peripheral access API for RV32M1_RI5CY microcontrollers (generated using svd2rust v0.16.1)

You can find an overview of the API here.

Modules

adc0

ADC

crc

CRC

dma0

DMA

dmamux0

DMA_CH_MUX

emvsim0

EMVSIM

ewm

EWM

fb

FB

flexio0

FLEXIO

ftfe

Flash

generic

Common register and bit access and modify traits

gpioa

GPIO

i2s0

I2S

llwu0

LLWU

lpcmp0

LPCMP

lpdac0

LPDAC

lpi2c0

LPI2C

lpi2c1

LPI2C

lpi2c2

LPI2C

lpit0

LPIT

lpspi0

LPSPI

lpspi1

LPSPI

lpspi2

LPSPI

lptmr0

LPTMR

lptmr1

LPTMR

lpuart0

LPUART

lpuart1

LPUART

lpuart2

LPUART

mscm

MSCM

mua

MUA

pcc0

PCC

porta

PORT

portb

PORT

portc

PORT

portd

PORT

rtc

RTC

scg

SCG

sema420

sema42_ips

sim

SIM

smc0

crr_cmc0

spm

SPM

tpm0

TPM

tpm1

TPM

tpm2

TPM

trgmux0

TRGMUX

tstmra

TSTMRA

usb0

USB

usbvreg

USBVREG

usdhc0

uSDHC

vref

VREF

wdog0

WDOG

xrdc

XRDC

Structs

ADC0

ADC

CRC

CRC

DMA0

DMA

DMAMUX0

DMA_CH_MUX

EMVSIM0

EMVSIM

EWM

EWM

FB

FB

FLEXIO0

FLEXIO

FTFE

Flash

GPIOA

GPIO

GPIOB

GPIO

GPIOC

GPIO

GPIOD

GPIO

GPIOE

GPIO

I2S0

I2S

LLWU0

LLWU

LPCMP0

LPCMP

LPDAC0

LPDAC

LPI2C0

LPI2C

LPI2C1

LPI2C

LPI2C2

LPI2C

LPIT0

LPIT

LPSPI0

LPSPI

LPSPI1

LPSPI

LPSPI2

LPSPI

LPTMR0

LPTMR

LPTMR1

LPTMR

LPUART0

LPUART

LPUART1

LPUART

LPUART2

LPUART

MSCM

MSCM

MUA

MUA

PCC0

PCC

PORTA

PORT

PORTB

PORT

PORTC

PORT

PORTD

PORT

Peripherals

All the peripherals

RTC

RTC

SCG

SCG

SEMA420

sema42_ips

SIM

SIM

SMC0

crr_cmc0

SPM

SPM

TPM0

TPM

TPM1

TPM

TPM2

TPM

TRGMUX0

TRGMUX

TSTMRA

TSTMRA

USB0

USB

USBVREG

USBVREG

USDHC0

uSDHC

VREF

VREF

WDOG0

WDOG

XRDC

XRDC

Enums

Interrupt

Enumeration of all the interrupts

Constants

NVIC_PRIO_BITS

Number available in the NVIC for configuring priority