Module rv32m1_ri5cy_pac::scg::sircdiv

Slow IRC Divide Register

Structs

SIRCDIV1_W	Write proxy for field SIRCDIV1
SIRCDIV2_W	Write proxy for field SIRCDIV2
SIRCDIV3_W	Write proxy for field SIRCDIV3

Enums

SIRCDIV1_A	Slow IRC Clock Divide 1
SIRCDIV2_A	Slow IRC Clock Divide 2
SIRCDIV3_A	Slow IRC Clock Divider 3

Type Definitions

R	Reader of register SIRCDIV
SIRCDIV1_R	Reader of field SIRCDIV1
SIRCDIV2_R	Reader of field SIRCDIV2
SIRCDIV3_R	Reader of field SIRCDIV3
W	Writer for register SIRCDIV