[][src]Crate ruspiro_register

System and MMIO register access

System register access

Definitions and simple access to the system registers used in the different RusPiRo crates. Depending on the target architecture the crate will be build for it contains the definitions of the Aarch64 or the Aarch32 CP15 system register.

Usage

use ruspiro_register::system::*;

#[cfg(target_arch="aarch64")]
fn enable_mmu() {
    // update the system control register in aarch64 to enable caching and the MMU in EL1
    sctlr_el1::write(
        sctlr_el1::M::ENABLE | // MMU
        sctlr_el1::C::ENABLE | // data cache
        sctlr_el1::I::ENABLE   // instruction cache
    );
}

#[cfg(target_arch="arm")]
fn enable_mmu() {
    // update the system control register in aarch32 to enable caching and the MMU
    sctlr::write(
        sctlr::M::ENABLE | // MMU
        sctlr::C::ENABLE | // data cache
        sctlr::I::ENABLE   // instruction cache
    );
}

MMIO register abstraction

Simple to use and compile time type safe abstraction of memory mapped (MMIO) registers of the Raspberry Pi.

Usage

Register defintitions are simple and straight forward using the macros provided by this crate. In your code you can define registers like this:

use ruspiro_register::*;

// define a single register without any specific fields, like the free running system timer counter low value
// of the Raspberry Pi 3. Valid register size types are u8, u16, u32, u64.
define_mmio_register!( TIMERCLO<ReadOnly<u32>@(0x3F00_3004)> );

// define a list of registers that may or may not contain a specific field configuration
define_mmio_register! [
    /// High 32Bit's of the free-running counter
    TIMERCHI<ReadOnly<u32>@(0x3F00_3008)>,
    /// The I²C control register
    I2C_C<ReadWrite<u32>@(0x3F80_4000)> {
        /// Flag to enable the I²C peripheral
        ENABLE     OFFSET(15),
        IRQ_RX     OFFSET(10),
        IRQ_TX     OFFSET(9),
        IRQ_DONE   OFFSET(8),
        STARTTRANS OFFSET(7),
        CLEAR      OFFSET(4) BITS(2),
        READ       OFFSET(1),
        WRITE      OFFSET(0)
    }
];

// With the name of the register given at the definition the contents and the fields are accessible like so:

fn test_mmio_register() {
    let _ = TIMERCHI::Register.get(); // get the raw register value
    let _ = I2C_C::Register.read(I2C_C::ENABLE); // get the value of the requested register field
    I2C_C::Register.modify(I2C_C::CLEAR, 0x1); // update a specific field value of the register
}

Modules

system

System register definitions

Macros

define_aarch32_register

Macro to define an Aarch32 (CP15) system register and its fields

define_aarch64_register

Macro to define an Aarch64 system register and its fields

define_mmio_register

Macro to define a MMIO register with specific defined access mode.
The access mode could one of: ReadOnly, WriteOnly, ReadWrite.
The register size/width could be one of: u8, u16, u32, u64

define_registerDeprecated

Examples

define_registersDeprecated

Macro to provide multiple register definitions at once

Structs

ReadOnly

This struct allows read only access to a register.

ReadWrite

This struct allows read/write access to a register.

RegisterField

Definition of a field contained inside of a register. Each field is defined by a mask and the bit shift value when constructing the field definition the stored mask is already shifted by the shift value

RegisterFieldValue

Definition of a specific fieldvalue of a regiser. This structure allows to combine field values with bit operators like | and & to build the final value that should be written to a register

WriteOnly

This struct allows write only access to a register.

Traits

RegisterType

This trait is used to describe the register size/length as type specifier. The trait is only implemented for the internal types u8, u16, u32 and u64 to ensure safe register access sizes with compile time checking