[−][src]Module ruspiro_register::system::aarch64::sctlr_el1
SCTLR_EL1 - System Control Register EL1
Provides top level control of the system, including its memory system at EL1.
Usage Constraints
EL0 | EL1 (NS) | EL1(S) | EL2 | EL3(NS) | EL3(S) |
---|---|---|---|---|---|
- | R/W | R/W | R/W | R/W | R/W |
Modules
A | AArch64 alignment fault check |
C | AArch64 global data cache |
CP15EN | AArch64 CP15 barrier operations enabled ? |
DZE | AArch64 Enables access to the DC ZVA instruction at EL0 |
E0E | AArch64 explicit data access endiannes at EL0 |
EE | AArch64 exception endiannes |
I | AArch64 instruction cache |
ITD | AArch64 IT instructions disabled ? |
M | AArch64 globally enable MMU |
NTWE | AArch64 Non-trapping WFE instruction |
NTWI | AArch64 Non-trapping WFI instruction |
SA | AArch64 stack alignment checks |
SA0 | AArch64 El0 stack alignment checks |
SED | AArch64 SETEND instructions disabled ? |
UCI | AArch64 Enable EL0 access to cache maintenance instructions: DC CVAU, DC CIVAC, DC CVAC and IC IVAU in Aarch64 mode |
UCT | AArch64 Enables EL0 access to the CTR_EL0 register in Aacrh64 mode |
UMA | AArch64 Controls access to interrupt masks from EL0 if EL0 is using Aarch64 |
WXN | AArch64 Force all memory regions with write permissions as XN |
Functions
get | AArch64 Read the raw register contents using the appropriate assembly |
read | AArch64 Read the contents of a specific |
set | AArch64 Write the raw register contents using the appropriate contents |
write | AArch64 Update the contents of a register from the |