Module ruspiro_arch_aarch64::register::el1::vbar_el1 [−][src]
Expand description
VBAR_EL1 - Vector Base Address Register EL1
Holds the exception base address for any exception that is taken to EL1
Usage Constraints
| EL0 | EL1 (NS) | EL1(S) | EL2 | EL3(NS) | EL3(S) |
|---|---|---|---|---|---|
| - | R/W | R/W | R/W | R/W | R/W |
Modules
Base address of the exception vectors for exceptions taken in this exception level
Functions
Read the raw register contents using the appropriate assembly
Read the contents of a specific RegisterField. The returned value is already shifted
to the right to start at bit 0. This means for a field value stored in the register at
bit offset 3, the returned value is already shifted by 3 bits to the right.
For example:
If register raw value is 0b10110, the returned value for a register field specified as
bits[4:3] would be 0b01. No further “masking” or “bit-shift” required
Write the raw register contents using the appropriate contents
Update the contents of a register from the RegisterFieldValue given. This will
only change the bits the RegisterField definition specifies.