Module ruspiro_arch_aarch64::register::el1::cpacr_el1

CPACR_EL1 - Architectural Feature Access Control Register

Controls access to trace functionality and access to registers associated with Advanced SIMD and Floating-point execution.

Usage Constraints

EL0	EL1 (NS)	EL1(S)	EL2	EL3(NS)	EL3(S)
-	-	-	-	R/W	R/W

Modules

FPEN
TTA

Functions

get	Read the raw register contents using the appropriate assembly
read	Read the contents of a specific RegisterField. The returned value is already shifted to the right to start at bit 0. This means for a field value stored in the register at bit offset 3, the returned value is already shifted by 3 bits to the right. For example: If register raw value is 0b10110, the returned value for a register field specified as bits[4:3] would be 0b01. No further "masking" or "bit-shift" required
set	Write the raw register contents using the appropriate contents
write	Update the contents of a register from the RegisterFieldValue given. This will only change the bits the RegisterField definition specifies.