[][src]Module rsl10_pac::dma::dma_ctrl0

DMA Channel Control and Configuration

Structs

ADDR_MODE_W

Write proxy for field ADDR_MODE

BYTE_ORDER_W

Write proxy for field BYTE_ORDER

CHANNEL_PRIORITY_W

Write proxy for field CHANNEL_PRIORITY

COMPLETE_INT_ENABLE_W

Write proxy for field COMPLETE_INT_ENABLE

COUNTER_INT_ENABLE_W

Write proxy for field COUNTER_INT_ENABLE

DEST_ADDR_INC_W

Write proxy for field DEST_ADDR_INC

DEST_ADDR_STEP_MODE_W

Write proxy for field DEST_ADDR_STEP_MODE

DEST_ADDR_STEP_SIZE_W

Write proxy for field DEST_ADDR_STEP_SIZE

DEST_SELECT_W

Write proxy for field DEST_SELECT

DEST_WORD_SIZE_W

Write proxy for field DEST_WORD_SIZE

DISABLE_INT_ENABLE_W

Write proxy for field DISABLE_INT_ENABLE

ENABLE_W

Write proxy for field ENABLE

ERROR_INT_ENABLE_W

Write proxy for field ERROR_INT_ENABLE

SRC_ADDR_INC_W

Write proxy for field SRC_ADDR_INC

SRC_ADDR_STEP_MODE_W

Write proxy for field SRC_ADDR_STEP_MODE

SRC_ADDR_STEP_SIZE_W

Write proxy for field SRC_ADDR_STEP_SIZE

SRC_SELECT_W

Write proxy for field SRC_SELECT

SRC_WORD_SIZE_W

Write proxy for field SRC_WORD_SIZE

START_INT_ENABLE_W

Write proxy for field START_INT_ENABLE

TRANSFER_TYPE_W

Write proxy for field TRANSFER_TYPE

Enums

ADDR_MODE_A

Select the addressing mode for this channel

BYTE_ORDER_A

Select the byte ordering for the DMA channel

CHANNEL_PRIORITY_A

Select the priority level for this channel

COMPLETE_INT_ENABLE_A

Raise an interrupt when the DMA transfer completes

COUNTER_INT_ENABLE_A

Raise an interrupt when the DMA transfer reaches the counter value

DEST_ADDR_INC_A

Configure whether the destination address should increment

DEST_ADDR_STEP_MODE_A

Configure the destination address to either increment or decrement

DEST_ADDR_STEP_SIZE_A

Select the destination address step size

DEST_SELECT_A

Select the request line for the destination

DEST_WORD_SIZE_A

Select the destination word size

DISABLE_INT_ENABLE_A

Raise an interrupt when the DMA channel is disabled

ENABLE_A

Enable DMA Channel

ERROR_INT_ENABLE_A

Raise an interrupt when a state machine error occurs during a DMA transfer

SRC_ADDR_INC_A

Configure whether the source address should increment

SRC_ADDR_STEP_MODE_A

Configure the source address to either increment or decrement

SRC_ADDR_STEP_SIZE_A

Select the source address step size

SRC_SELECT_A

Select the request line for the source

SRC_WORD_SIZE_A

Select the source word size

START_INT_ENABLE_A

Raise an interrupt when the DMA transfer starts

TRANSFER_TYPE_A

Select the type of transfer implemented by DMA channel

Type Definitions

ADDR_MODE_R

Reader of field ADDR_MODE

BYTE_ORDER_R

Reader of field BYTE_ORDER

CHANNEL_PRIORITY_R

Reader of field CHANNEL_PRIORITY

COMPLETE_INT_ENABLE_R

Reader of field COMPLETE_INT_ENABLE

COUNTER_INT_ENABLE_R

Reader of field COUNTER_INT_ENABLE

DEST_ADDR_INC_R

Reader of field DEST_ADDR_INC

DEST_ADDR_STEP_MODE_R

Reader of field DEST_ADDR_STEP_MODE

DEST_ADDR_STEP_SIZE_R

Reader of field DEST_ADDR_STEP_SIZE

DEST_SELECT_R

Reader of field DEST_SELECT

DEST_WORD_SIZE_R

Reader of field DEST_WORD_SIZE

DISABLE_INT_ENABLE_R

Reader of field DISABLE_INT_ENABLE

ENABLE_R

Reader of field ENABLE

ERROR_INT_ENABLE_R

Reader of field ERROR_INT_ENABLE

R

Reader of register DMA_CTRL0[%s]

SRC_ADDR_INC_R

Reader of field SRC_ADDR_INC

SRC_ADDR_STEP_MODE_R

Reader of field SRC_ADDR_STEP_MODE

SRC_ADDR_STEP_SIZE_R

Reader of field SRC_ADDR_STEP_SIZE

SRC_SELECT_R

Reader of field SRC_SELECT

SRC_WORD_SIZE_R

Reader of field SRC_WORD_SIZE

START_INT_ENABLE_R

Reader of field START_INT_ENABLE

TRANSFER_TYPE_R

Reader of field TRANSFER_TYPE

W

Writer for register DMA_CTRL0[%s]