Crate rsl10_pac

Source
Expand description

Peripheral access API for RSL10 microcontrollers (generated using svd2rust v0.17.0)

You can find an overview of the API here.

Modules§

  • ACS domain (Analog Bridge Access)
  • Analog-to-Digital Converter and Battery Monitoring
  • Chip Identification
  • ASRC Configuration and Control
  • DMIC Input and Output Driver Configuration and Control
  • Audio Sink Clock Counters
  • Baseband Controller
  • Baseband Controller Interface
  • Clock Generation
  • CRC Generator Control
  • Debug Controller
  • Reset
  • DIO Interface and Digital Pad control
  • DMA Controller Configuration and Control
  • Flash Interface Configuration and Control
  • Common register and bit access and modify traits
  • I2C Interface Configuration and Control
  • PCM Interface Configuration and Control
  • PWM 0 and 1 Configuration and Control
  • RF Front-End 2.4 GHz
  • System Control and ID register not in the SCB
  • SPI Interface Configuration and Control
  • SPI Interface Configuration and Control
  • SYSTICK Timer
  • System Control
  • General-Purpose Timers 0, 1, 2 and 3
  • UART Interface Configuration and Control
  • Watchdog Timer

Structs§

  • ACS domain (Analog Bridge Access)
  • Analog-to-Digital Converter and Battery Monitoring
  • Chip Identification
  • ASRC Configuration and Control
  • DMIC Input and Output Driver Configuration and Control
  • Audio Sink Clock Counters
  • Baseband Controller
  • Baseband Controller Interface
  • Cache and branch predictor maintenance operations
  • Clock Generation
  • CPUID
  • CRC Generator Control
  • Core peripherals
  • Debug Control Block
  • Debug Controller
  • Reset
  • DIO Interface and Digital Pad control
  • DMA Controller Configuration and Control
  • Data Watchpoint and Trace unit
  • Flash Interface Configuration and Control
  • Flash Patch and Breakpoint unit
  • I2C Interface Configuration and Control
  • Instrumentation Trace Macrocell
  • Memory Protection Unit
  • Nested Vector Interrupt Controller
  • PCM Interface Configuration and Control
  • PWM 0 and 1 Configuration and Control
  • All the peripherals
  • RF Front-End 2.4 GHz
  • System Control Block
  • System Control and ID register not in the SCB
  • SPI Interface Configuration and Control
  • SPI Interface Configuration and Control
  • System Control
  • SysTick: System Timer
  • SYSTICK Timer
  • General-Purpose Timers 0, 1, 2 and 3
  • Trace Port Interface Unit
  • UART Interface Configuration and Control
  • Watchdog Timer

Enums§

Constants§