[−][src]Module rsl10_pac::rf::rf_reg28
REG28
Structs
| CTRL_RX_CTRL_RX_W | Write proxy for field |
| CTRL_RX_START_MIX_ON_CAL_W | Write proxy for field |
| CTRL_RX_SWITCH_LP_W | Write proxy for field |
| CTRL_RX_USE_PEAK_DETECTOR_W | Write proxy for field |
| DLL_CTRL_CK_DIG_EN_W | Write proxy for field |
| DLL_CTRL_CK_EXT_SEL_W | Write proxy for field |
| DLL_CTRL_CK_FIRST_SEL_DELAY_W | Write proxy for field |
| DLL_CTRL_CK_LAST_SEL_DELAY_W | Write proxy for field |
| DLL_CTRL_CK_SEL_W | Write proxy for field |
| DLL_CTRL_CK_TEST_EN_W | Write proxy for field |
| DLL_CTRL_FAST_ENB_W | Write proxy for field |
| DLL_CTRL_LOCKED_AUTO_CHECK_EN_W | Write proxy for field |
| DLL_CTRL_LOCKED_DET_EN_W | Write proxy for field |
| DLL_CTRL_TOO_FAST_ENB_W | Write proxy for field |
| SWCAP_FSM_SB_CAP_RX_W | Write proxy for field |
| SWCAP_FSM_SB_CAP_TX_W | Write proxy for field |
Enums
| CTRL_RX_CTRL_RX_A | bits(1:0) => resonance 1 LNA, bits(3:2) => resonance 2 LNA, bit(4) => IFA PTAT-R only |
| CTRL_RX_START_MIX_ON_CAL_A | If set to 1, the mixer is enabled during the sub-band selection phase |
| CTRL_RX_SWITCH_LP_A | If set to 1 switch the low-pass filter in the Rx chain |
| CTRL_RX_USE_PEAK_DETECTOR_A | If set to 1, the peak detector is powered on during the Rx by the FSM |
| DLL_CTRL_CK_DIG_EN_A | Debug: enable to use the alternate ck_dig pin to output the PLL reference clock signal |
| DLL_CTRL_CK_EXT_SEL_A | Low: input clock comes from ck_xtal pin (default). High: input clock comes from ck_ext pin |
| DLL_CTRL_CK_FIRST_SEL_DELAY_A | Value on reset: 0 |
| DLL_CTRL_CK_LAST_SEL_DELAY_A | Value on reset: 0 |
| DLL_CTRL_CK_SEL_A | Selection of the clock used as frequency reference of the PLL (also to ck_test and ck_dig outputs): 00 => ref = ck_xtal ot ck_ext (if bit 8 is high), 01 => ref = same as ck_sel = 00 if dll_en = 0, otherwise frequency(ref) = 3x frequency(ck_xtal) or 3x frequency(ck_ext) (if bit 8 is high), 10 => ref = same as ck_sel = 01 but output frequency divided by 2 (used in normal RX mode when dll_en = 0), 11 => ref = same as ck_sel = 01 but output frequency divided by 5 (used for RX mode with external signal at 132 MHz when dll_en = 0) |
| DLL_CTRL_CK_TEST_EN_A | Debug: enable to output on GPIO the PLL reference clock signal via ck_test pin |
| DLL_CTRL_FAST_ENB_A | Enable, when low, fast mode locking of the reference frequency multiplier (default). Bit 5 must also be set low in this mode of operation (see below) |
| DLL_CTRL_LOCKED_AUTO_CHECK_EN_A | If for some reason the reference frequency multiplier is out of lock (usually because some input clocks from ck_xtal or ck_ext are missing) and this signal is high, the frequency multiplier will try to lock again automatically. Otherwise, a manual reset should be performed via dll_rstb input(see Table 3) to relock the frequency multiplier. This mode only works if bit 4 is also high (locked detector enabled, see below) |
| DLL_CTRL_LOCKED_DET_EN_A | Enable reference frequency multiplier locked detector. When this signal is high, the dll_locked output goes high when the output multiplied clock is nearly about three times the frequency of the input clock. |
| DLL_CTRL_TOO_FAST_ENB_A | When low, enable auxiliary wide lock range phase detector when fast mode locking is enabled (fast_enb = 0). When high, only the narrow lock range phase detector is enabled and bit 2 (fast_enb) must be high to avoid false frequency lock (slow mode locking) |
| SWCAP_FSM_SB_CAP_RX_A | VCO subband selection (Rx in FSM mode) |
| SWCAP_FSM_SB_CAP_TX_A | VCO subband selection (Tx in FSM mode) |
Type Definitions
| CTRL_RX_CTRL_RX_R | Reader of field |
| CTRL_RX_START_MIX_ON_CAL_R | Reader of field |
| CTRL_RX_SWITCH_LP_R | Reader of field |
| CTRL_RX_USE_PEAK_DETECTOR_R | Reader of field |
| DLL_CTRL_CK_DIG_EN_R | Reader of field |
| DLL_CTRL_CK_EXT_SEL_R | Reader of field |
| DLL_CTRL_CK_FIRST_SEL_DELAY_R | Reader of field |
| DLL_CTRL_CK_LAST_SEL_DELAY_R | Reader of field |
| DLL_CTRL_CK_SEL_R | Reader of field |
| DLL_CTRL_CK_TEST_EN_R | Reader of field |
| DLL_CTRL_FAST_ENB_R | Reader of field |
| DLL_CTRL_LOCKED_AUTO_CHECK_EN_R | Reader of field |
| DLL_CTRL_LOCKED_DET_EN_R | Reader of field |
| DLL_CTRL_TOO_FAST_ENB_R | Reader of field |
| R | Reader of register RF_REG28 |
| SWCAP_FSM_SB_CAP_RX_R | Reader of field |
| SWCAP_FSM_SB_CAP_TX_R | Reader of field |
| W | Writer for register RF_REG28 |