Module rp2040::usbctrl_regs

USB FS/LS controller device registers

Modules

addr_endp	Device address and endpoint control
addr_endp1	Interrupt endpoint 1. Only valid for HOST mode.
addr_endp2	Interrupt endpoint 2. Only valid for HOST mode.
addr_endp3	Interrupt endpoint 3. Only valid for HOST mode.
addr_endp4	Interrupt endpoint 4. Only valid for HOST mode.
addr_endp5	Interrupt endpoint 5. Only valid for HOST mode.
addr_endp6	Interrupt endpoint 6. Only valid for HOST mode.
addr_endp7	Interrupt endpoint 7. Only valid for HOST mode.
addr_endp8	Interrupt endpoint 8. Only valid for HOST mode.
addr_endp9	Interrupt endpoint 9. Only valid for HOST mode.
addr_endp10	Interrupt endpoint 10. Only valid for HOST mode.
addr_endp11	Interrupt endpoint 11. Only valid for HOST mode.
addr_endp12	Interrupt endpoint 12. Only valid for HOST mode.
addr_endp13	Interrupt endpoint 13. Only valid for HOST mode.
addr_endp14	Interrupt endpoint 14. Only valid for HOST mode.
addr_endp15	Interrupt endpoint 15. Only valid for HOST mode.
buff_cpu_should_handle	Which of the double buffers should be handled. Only valid if using an interrupt per buffer (i.e. not per 2 buffers). Not valid for host interrupt endpoint polling because they are only single buffered.
buff_status	Buffer status register. A bit set here indicates that a buffer has completed on the endpoint (if the buffer interrupt is enabled). It is possible for 2 buffers to be completed, so clearing the buffer status bit may instantly re set it on the next clock cycle.
ep_abort	Device only: Can be set to ignore the buffer control register for this endpoint in case you would like to revoke a buffer. A NAK will be sent for every access to the endpoint until this bit is cleared. A corresponding bit in EP_ABORT_DONE is set when it is safe to modify the buffer control register.
ep_abort_done	Device only: Used in conjunction with EP_ABORT. Set once an endpoint is idle so the programmer knows it is safe to modify the buffer control register.
ep_stall_arm	Device: this bit must be set in conjunction with the STALL bit in the buffer control register to send a STALL on EP0. The device controller clears these bits when a SETUP packet is received because the USB spec requires that a STALL condition is cleared when a SETUP packet is received.
ep_status_stall_nak	Device: bits are set when the IRQ_ON_NAK or IRQ_ON_STALL bits are set. For EP0 this comes from SIE_CTRL. For all other endpoints it comes from the endpoint control register.
int_ep_ctrl	interrupt endpoint control register
inte	Interrupt Enable
intf	Interrupt Force
intr	Raw Interrupts
ints	Interrupt status after masking & forcing
main_ctrl	Main control register
nak_poll	Used by the host controller. Sets the wait time in microseconds before trying again if the device replies with a NAK.
sie_ctrl	SIE control register
sie_status	SIE status register
sof_rd	Read the last SOF (Start of Frame) frame number seen. In device mode the last SOF received from the host. In host mode the last SOF sent by the host.
sof_wr	Set the SOF (Start of Frame) frame number in the host controller. The SOF packet is sent every 1ms and the host will increment the frame number by 1 each time.
usb_muxing	Where to connect the USB controller. Should be to_phy by default.
usb_pwr	Overrides for the power signals in the event that the VBUS signals are not hooked up to GPIO. Set the value of the override and then the override enable to switch over to the override value.
usbphy_direct	This register allows for direct control of the USB phy. Use in conjunction with usbphy_direct_override register to enable each override bit.
usbphy_direct_override	Override enable for each control in usbphy_direct
usbphy_trim	Used to adjust trim values of USB phy pull down resistors.

Structs

RegisterBlock

Register block

Type Definitions

ADDR_ENDP	Device address and endpoint control
ADDR_ENDP1	Interrupt endpoint 1. Only valid for HOST mode.
ADDR_ENDP2	Interrupt endpoint 2. Only valid for HOST mode.
ADDR_ENDP3	Interrupt endpoint 3. Only valid for HOST mode.
ADDR_ENDP4	Interrupt endpoint 4. Only valid for HOST mode.
ADDR_ENDP5	Interrupt endpoint 5. Only valid for HOST mode.
ADDR_ENDP6	Interrupt endpoint 6. Only valid for HOST mode.
ADDR_ENDP7	Interrupt endpoint 7. Only valid for HOST mode.
ADDR_ENDP8	Interrupt endpoint 8. Only valid for HOST mode.
ADDR_ENDP9	Interrupt endpoint 9. Only valid for HOST mode.
ADDR_ENDP10	Interrupt endpoint 10. Only valid for HOST mode.
ADDR_ENDP11	Interrupt endpoint 11. Only valid for HOST mode.
ADDR_ENDP12	Interrupt endpoint 12. Only valid for HOST mode.
ADDR_ENDP13	Interrupt endpoint 13. Only valid for HOST mode.
ADDR_ENDP14	Interrupt endpoint 14. Only valid for HOST mode.
ADDR_ENDP15	Interrupt endpoint 15. Only valid for HOST mode.
BUFF_CPU_SHOULD_HANDLE	Which of the double buffers should be handled. Only valid if using an interrupt per buffer (i.e. not per 2 buffers). Not valid for host interrupt endpoint polling because they are only single buffered.
BUFF_STATUS	Buffer status register. A bit set here indicates that a buffer has completed on the endpoint (if the buffer interrupt is enabled). It is possible for 2 buffers to be completed, so clearing the buffer status bit may instantly re set it on the next clock cycle.
EP_ABORT	Device only: Can be set to ignore the buffer control register for this endpoint in case you would like to revoke a buffer. A NAK will be sent for every access to the endpoint until this bit is cleared. A corresponding bit in EP_ABORT_DONE is set when it is safe to modify the buffer control register.
EP_ABORT_DONE	Device only: Used in conjunction with EP_ABORT. Set once an endpoint is idle so the programmer knows it is safe to modify the buffer control register.
EP_STALL_ARM	Device: this bit must be set in conjunction with the STALL bit in the buffer control register to send a STALL on EP0. The device controller clears these bits when a SETUP packet is received because the USB spec requires that a STALL condition is cleared when a SETUP packet is received.
EP_STATUS_STALL_NAK	Device: bits are set when the IRQ_ON_NAK or IRQ_ON_STALL bits are set. For EP0 this comes from SIE_CTRL. For all other endpoints it comes from the endpoint control register.
INTE	Interrupt Enable
INTF	Interrupt Force
INTR	Raw Interrupts
INTS	Interrupt status after masking & forcing
INT_EP_CTRL	interrupt endpoint control register
MAIN_CTRL	Main control register
NAK_POLL	Used by the host controller. Sets the wait time in microseconds before trying again if the device replies with a NAK.
SIE_CTRL	SIE control register
SIE_STATUS	SIE status register
SOF_RD	Read the last SOF (Start of Frame) frame number seen. In device mode the last SOF received from the host. In host mode the last SOF sent by the host.
SOF_WR	Set the SOF (Start of Frame) frame number in the host controller. The SOF packet is sent every 1ms and the host will increment the frame number by 1 each time.
USBPHY_DIRECT	This register allows for direct control of the USB phy. Use in conjunction with usbphy_direct_override register to enable each override bit.
USBPHY_DIRECT_OVERRIDE	Override enable for each control in usbphy_direct
USBPHY_TRIM	Used to adjust trim values of USB phy pull down resistors.
USB_MUXING	Where to connect the USB controller. Should be to_phy by default.
USB_PWR	Overrides for the power signals in the event that the VBUS signals are not hooked up to GPIO. Set the value of the override and then the override enable to switch over to the override value.