[−][src]Module rp2040::spi0
SPI0
Modules
sspcpsr | Clock prescale register, SSPCPSR on page 3-8 |
sspcr0 | Control register 0, SSPCR0 on page 3-4 |
sspcr1 | Control register 1, SSPCR1 on page 3-5 |
sspdmacr | DMA control register, SSPDMACR on page 3-12 |
sspdr | Data register, SSPDR on page 3-6 |
sspicr | Interrupt clear register, SSPICR on page 3-11 |
sspimsc | Interrupt mask set or clear register, SSPIMSC on page 3-9 |
sspmis | Masked interrupt status register, SSPMIS on page 3-11 |
ssppcellid0 | PrimeCell identification registers, SSPPCellID0-3 on page 3-16 |
ssppcellid1 | PrimeCell identification registers, SSPPCellID0-3 on page 3-16 |
ssppcellid2 | PrimeCell identification registers, SSPPCellID0-3 on page 3-16 |
ssppcellid3 | PrimeCell identification registers, SSPPCellID0-3 on page 3-16 |
sspperiphid0 | Peripheral identification registers, SSPPeriphID0-3 on page 3-13 |
sspperiphid1 | Peripheral identification registers, SSPPeriphID0-3 on page 3-13 |
sspperiphid2 | Peripheral identification registers, SSPPeriphID0-3 on page 3-13 |
sspperiphid3 | Peripheral identification registers, SSPPeriphID0-3 on page 3-13 |
sspris | Raw interrupt status register, SSPRIS on page 3-10 |
sspsr | Status register, SSPSR on page 3-7 |
Structs
RegisterBlock | Register block |
Type Definitions
SSPCPSR | Clock prescale register, SSPCPSR on page 3-8 |
SSPCR0 | Control register 0, SSPCR0 on page 3-4 |
SSPCR1 | Control register 1, SSPCR1 on page 3-5 |
SSPDMACR | DMA control register, SSPDMACR on page 3-12 |
SSPDR | Data register, SSPDR on page 3-6 |
SSPICR | Interrupt clear register, SSPICR on page 3-11 |
SSPIMSC | Interrupt mask set or clear register, SSPIMSC on page 3-9 |
SSPMIS | Masked interrupt status register, SSPMIS on page 3-11 |
SSPPCELLID0 | PrimeCell identification registers, SSPPCellID0-3 on page 3-16 |
SSPPCELLID1 | PrimeCell identification registers, SSPPCellID0-3 on page 3-16 |
SSPPCELLID2 | PrimeCell identification registers, SSPPCellID0-3 on page 3-16 |
SSPPCELLID3 | PrimeCell identification registers, SSPPCellID0-3 on page 3-16 |
SSPPERIPHID0 | Peripheral identification registers, SSPPeriphID0-3 on page 3-13 |
SSPPERIPHID1 | Peripheral identification registers, SSPPeriphID0-3 on page 3-13 |
SSPPERIPHID2 | Peripheral identification registers, SSPPeriphID0-3 on page 3-13 |
SSPPERIPHID3 | Peripheral identification registers, SSPPeriphID0-3 on page 3-13 |
SSPRIS | Raw interrupt status register, SSPRIS on page 3-10 |
SSPSR | Status register, SSPSR on page 3-7 |