[−][src]Module rp2040::clocks
CLOCKS
Modules
| clk_adc_ctrl | Clock control, can be changed on-the-fly (except for auxsrc) |
| clk_adc_div | Clock divisor, can be changed on-the-fly |
| clk_adc_selected | Indicates which src is currently selected (one-hot) |
| clk_gpout0_ctrl | Clock control, can be changed on-the-fly (except for auxsrc) |
| clk_gpout0_div | Clock divisor, can be changed on-the-fly |
| clk_gpout0_selected | Indicates which src is currently selected (one-hot) |
| clk_gpout1_ctrl | Clock control, can be changed on-the-fly (except for auxsrc) |
| clk_gpout1_div | Clock divisor, can be changed on-the-fly |
| clk_gpout1_selected | Indicates which src is currently selected (one-hot) |
| clk_gpout2_ctrl | Clock control, can be changed on-the-fly (except for auxsrc) |
| clk_gpout2_div | Clock divisor, can be changed on-the-fly |
| clk_gpout2_selected | Indicates which src is currently selected (one-hot) |
| clk_gpout3_ctrl | Clock control, can be changed on-the-fly (except for auxsrc) |
| clk_gpout3_div | Clock divisor, can be changed on-the-fly |
| clk_gpout3_selected | Indicates which src is currently selected (one-hot) |
| clk_peri_ctrl | Clock control, can be changed on-the-fly (except for auxsrc) |
| clk_peri_selected | Indicates which src is currently selected (one-hot) |
| clk_ref_ctrl | Clock control, can be changed on-the-fly (except for auxsrc) |
| clk_ref_div | Clock divisor, can be changed on-the-fly |
| clk_ref_selected | Indicates which src is currently selected (one-hot) |
| clk_rtc_ctrl | Clock control, can be changed on-the-fly (except for auxsrc) |
| clk_rtc_div | Clock divisor, can be changed on-the-fly |
| clk_rtc_selected | Indicates which src is currently selected (one-hot) |
| clk_sys_ctrl | Clock control, can be changed on-the-fly (except for auxsrc) |
| clk_sys_div | Clock divisor, can be changed on-the-fly |
| clk_sys_resus_ctrl | |
| clk_sys_resus_status | |
| clk_sys_selected | Indicates which src is currently selected (one-hot) |
| clk_usb_ctrl | Clock control, can be changed on-the-fly (except for auxsrc) |
| clk_usb_div | Clock divisor, can be changed on-the-fly |
| clk_usb_selected | Indicates which src is currently selected (one-hot) |
| enabled0 | indicates the state of the clock enable |
| enabled1 | indicates the state of the clock enable |
| fc0_delay | Delays the start of frequency counting to allow the mux to settle\n Delay is measured in multiples of the reference clock period |
| fc0_interval | The test interval is 0.98us * 2interval, but let's call it 1us * 2interval\n The default gives a test interval of 250us |
| fc0_max_khz | Maximum pass frequency in kHz. This is optional. Set to 0x1ffffff if you are not using the pass/fail flags |
| fc0_min_khz | Minimum pass frequency in kHz. This is optional. Set to 0 if you are not using the pass/fail flags |
| fc0_ref_khz | Reference clock frequency in kHz |
| fc0_result | Result of frequency measurement, only valid when status_done=1 |
| fc0_src | Clock sent to frequency counter, set to 0 when not required\n Writing to this register initiates the frequency count |
| fc0_status | Frequency counter status |
| inte | Interrupt Enable |
| intf | Interrupt Force |
| intr | Raw Interrupts |
| ints | Interrupt status after masking & forcing |
| sleep_en0 | enable clock in sleep mode |
| sleep_en1 | enable clock in sleep mode |
| wake_en0 | enable clock in wake mode |
| wake_en1 | enable clock in wake mode |
Structs
| RegisterBlock | Register block |
Type Definitions
| CLK_ADC_CTRL | Clock control, can be changed on-the-fly (except for auxsrc) |
| CLK_ADC_DIV | Clock divisor, can be changed on-the-fly |
| CLK_ADC_SELECTED | Indicates which src is currently selected (one-hot) |
| CLK_GPOUT0_CTRL | Clock control, can be changed on-the-fly (except for auxsrc) |
| CLK_GPOUT0_DIV | Clock divisor, can be changed on-the-fly |
| CLK_GPOUT0_SELECTED | Indicates which src is currently selected (one-hot) |
| CLK_GPOUT1_CTRL | Clock control, can be changed on-the-fly (except for auxsrc) |
| CLK_GPOUT1_DIV | Clock divisor, can be changed on-the-fly |
| CLK_GPOUT1_SELECTED | Indicates which src is currently selected (one-hot) |
| CLK_GPOUT2_CTRL | Clock control, can be changed on-the-fly (except for auxsrc) |
| CLK_GPOUT2_DIV | Clock divisor, can be changed on-the-fly |
| CLK_GPOUT2_SELECTED | Indicates which src is currently selected (one-hot) |
| CLK_GPOUT3_CTRL | Clock control, can be changed on-the-fly (except for auxsrc) |
| CLK_GPOUT3_DIV | Clock divisor, can be changed on-the-fly |
| CLK_GPOUT3_SELECTED | Indicates which src is currently selected (one-hot) |
| CLK_PERI_CTRL | Clock control, can be changed on-the-fly (except for auxsrc) |
| CLK_PERI_SELECTED | Indicates which src is currently selected (one-hot) |
| CLK_REF_CTRL | Clock control, can be changed on-the-fly (except for auxsrc) |
| CLK_REF_DIV | Clock divisor, can be changed on-the-fly |
| CLK_REF_SELECTED | Indicates which src is currently selected (one-hot) |
| CLK_RTC_CTRL | Clock control, can be changed on-the-fly (except for auxsrc) |
| CLK_RTC_DIV | Clock divisor, can be changed on-the-fly |
| CLK_RTC_SELECTED | Indicates which src is currently selected (one-hot) |
| CLK_SYS_CTRL | Clock control, can be changed on-the-fly (except for auxsrc) |
| CLK_SYS_DIV | Clock divisor, can be changed on-the-fly |
| CLK_SYS_RESUS_CTRL | This register you can |
| CLK_SYS_RESUS_STATUS | |
| CLK_SYS_SELECTED | Indicates which src is currently selected (one-hot) |
| CLK_USB_CTRL | Clock control, can be changed on-the-fly (except for auxsrc) |
| CLK_USB_DIV | Clock divisor, can be changed on-the-fly |
| CLK_USB_SELECTED | Indicates which src is currently selected (one-hot) |
| ENABLED0 | indicates the state of the clock enable |
| ENABLED1 | indicates the state of the clock enable |
| FC0_DELAY | Delays the start of frequency counting to allow the mux to settle\n Delay is measured in multiples of the reference clock period |
| FC0_INTERVAL | The test interval is 0.98us * 2interval, but let's call it 1us * 2interval\n The default gives a test interval of 250us |
| FC0_MAX_KHZ | Maximum pass frequency in kHz. This is optional. Set to 0x1ffffff if you are not using the pass/fail flags |
| FC0_MIN_KHZ | Minimum pass frequency in kHz. This is optional. Set to 0 if you are not using the pass/fail flags |
| FC0_REF_KHZ | Reference clock frequency in kHz |
| FC0_RESULT | Result of frequency measurement, only valid when status_done=1 |
| FC0_SRC | Clock sent to frequency counter, set to 0 when not required\n Writing to this register initiates the frequency count |
| FC0_STATUS | Frequency counter status |
| INTE | Interrupt Enable |
| INTF | Interrupt Force |
| INTR | Raw Interrupts |
| INTS | Interrupt status after masking & forcing |
| SLEEP_EN0 | enable clock in sleep mode |
| SLEEP_EN1 | enable clock in sleep mode |
| WAKE_EN0 | enable clock in wake mode |
| WAKE_EN1 | enable clock in wake mode |