Type Alias rp2040_pac::dma::ch::CH_TRANS_COUNT

pub type CH_TRANS_COUNT = Reg<CH_TRANS_COUNT_SPEC>;

CH_TRANS_COUNT (rw) register accessor: DMA Channel 0 Transfer Count
Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).

When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.

Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.

The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.

You can read this register and get ch_trans_count::R. You can reset, write, write_with_zero this register using ch_trans_count::W. You can also modify this register. See API.

For information about available fields see ch_trans_count module

Aliased Type

struct CH_TRANS_COUNT { /* private fields */ }