Module rk3399_rs::ddr_pi::pi_reg_8

DDR PHY Independent Register 8

Structs

• PiReg8Spec
  DDR PHY Independent Register 8

Type Aliases

• PiTdfiPhyupdType0F0R
  Field PI_TDFI_PHYUPD_TYPE0_F0 reader - Defines the DFI tPHYUPD_TYPE0 timing parameter (in DFI clocks), the maximum cycles that dfi_phyupd_req can assert after dfi_phyupd_ack for dfi_phyupd_type 0. If programmed to a non-zero, a timing violation causes an interrupt and bit4 set in the PI_REG_193.pi_update_error_status parameter and bit4 set in the PI_REG_22.pi_control_error_status parameter. The suffix f0 of the parameter name is omitted when in non-DFS mode.
• PiTdfiPhyupdType0F0W
  Field PI_TDFI_PHYUPD_TYPE0_F0 writer - Defines the DFI tPHYUPD_TYPE0 timing parameter (in DFI clocks), the maximum cycles that dfi_phyupd_req can assert after dfi_phyupd_ack for dfi_phyupd_type 0. If programmed to a non-zero, a timing violation causes an interrupt and bit4 set in the PI_REG_193.pi_update_error_status parameter and bit4 set in the PI_REG_22.pi_control_error_status parameter. The suffix f0 of the parameter name is omitted when in non-DFS mode.
• R
  Register PI_REG_8 reader
• W
  Register PI_REG_8 writer