Module rk3399_rs::ddr_mon::ddrmon_ddr_if_ctrl

DDR interface Control Register

Structs

• DdrmonDdrIfCtrlSpec
  DDR interface Control Register

Enums

• Ch0Direction
  Write or read monitor in channel 0 for command statistics
• Ch1Direction
  Write or read monitor in channel 1 for command statistics
• IfMonEn
  DDR interface and DFI monitor enable

Type Aliases

• Ch0DirectionR
  Field CH0_DIRECTION reader - Write or read monitor in channel 0 for command statistics
• Ch0DirectionW
  Field CH0_DIRECTION writer - Write or read monitor in channel 0 for command statistics
• Ch1DirectionR
  Field CH1_DIRECTION reader - Write or read monitor in channel 1 for command statistics
• Ch1DirectionW
  Field CH1_DIRECTION writer - Write or read monitor in channel 1 for command statistics
• IfMonEnR
  Field IF_MON_EN reader - DDR interface and DFI monitor enable
• IfMonEnW
  Field IF_MON_EN writer - DDR interface and DFI monitor enable
• R
  Register DDRMON_DDR_IF_CTRL reader
• W
  Register DDRMON_DDR_IF_CTRL writer
• WriteEnableR
  Field WRITE_ENABLE reader - bit0~15 write enable When bit 16=1, bit 0 can be written by software. When bit 16=0, bit 0 cannot be written by software; When bit 17=1, bit 1 can be written by software. When bit 17=0, bit 1 cannot be written by software; …… When bit 31=1, bit 15 can be written by software. When bit 31=0, bit 15 cannot be written by software;
• WriteEnableW
  Field WRITE_ENABLE writer - bit0~15 write enable When bit 16=1, bit 0 can be written by software. When bit 16=0, bit 0 cannot be written by software; When bit 17=1, bit 1 can be written by software. When bit 17=0, bit 1 cannot be written by software; …… When bit 31=1, bit 15 can be written by software. When bit 31=0, bit 15 cannot be written by software;