1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
#![doc = include_str!("../README.md")]
#![cfg_attr(not(feature = "std"), no_std)]
#![cfg_attr(not(feature = "std"), feature(alloc_error_handler))]
#![deny(rustdoc::broken_intra_doc_links)]
extern crate alloc;
mod control_id;
#[cfg(any(target_os = "zkvm", doc))]
pub mod guest;
#[cfg(feature = "prove")]
pub mod prove;
pub mod receipt;
pub mod serde;
pub mod sha;
#[cfg(test)]
mod tests;
pub use anyhow::Result;
use control_id::CONTROL_ID;
use risc0_zkp::core::sha::Digest;
pub use risc0_zkvm_platform::{memory::MEM_SIZE, PAGE_SIZE};
#[cfg(feature = "prove")]
pub use crate::prove::{elf::Program, image::MemoryImage, loader::Loader, Prover, ProverOpts};
pub use crate::receipt::Receipt;
const CIRCUIT: risc0_circuit_rv32im::CircuitImpl = risc0_circuit_rv32im::CircuitImpl::new();
#[derive(Clone, Debug, Eq, PartialEq)]
pub struct ControlId {
pub table: alloc::vec::Vec<Digest>,
}
impl ControlId {
pub fn new() -> Self {
let mut table = alloc::vec::Vec::new();
for entry in CONTROL_ID {
table.push(Digest::from(entry));
}
ControlId { table }
}
}