Struct regalloc::RegAllocResult

pub struct RegAllocResult<F: Function> {
    pub insns: Vec<F::Inst>,
    pub target_map: TypedIxVec<BlockIx, InstIx>,
    pub orig_insn_map: TypedIxVec<InstIx, InstIx>,
    pub clobbered_registers: Set<RealReg>,
    pub num_spill_slots: u32,
    pub block_annotations: Option<TypedIxVec<BlockIx, Vec<String>>>,
    pub stackmaps: Vec<Vec<SpillSlot>>,
    pub new_safepoint_insns: Vec<InstIx>,
}

The result of register allocation. Note that allocation can fail!

Fields

insns: Vec<F::Inst>

A new sequence of instructions with all register slots filled with real registers, and spills/fills/moves possibly inserted (and unneeded moves elided).

target_map: TypedIxVec<BlockIx, InstIx>

Basic-block start indices for the new instruction list, indexed by the original basic block indices. May be used by the client to, e.g., remap branch targets appropriately.

orig_insn_map: TypedIxVec<InstIx, InstIx>

Full mapping from new instruction indices to original instruction indices. May be needed by the client to, for example, update metadata such as debug/source-location info as the instructions are spliced and reordered.

Each entry is an InstIx, but may be InstIx::invalid_value() if the new instruction at this new index was inserted by the allocator (i.e., if it is a load, spill or move instruction).

clobbered_registers: Set<RealReg>

Which real registers were overwritten? This will contain all real regs that appear as defs or modifies in register slots of the output instruction list. This will only list registers that are available to the allocator. If one of the instructions clobbers a register which isn’t available to the allocator, it won’t be mentioned here.

num_spill_slots: u32

How many spill slots were used?

block_annotations: Option<TypedIxVec<BlockIx, Vec<String>>>

Block annotation strings, for debugging. Requires requesting in the call to allocate_registers. Creating of these annotations is potentially expensive, so don’t request them if you don’t need them.

stackmaps: Vec<Vec<SpillSlot>>

If stackmap support was requested: one stackmap for each of the safepoint instructions declared. Otherwise empty.

new_safepoint_insns: Vec<InstIx>

If stackmap support was requested: one InstIx for each safepoint instruction declared, indicating the corresponding location in the final instruction stream. Otherwise empty.