Struct raw_cpuid::SvmFeatures [−][src]
pub struct SvmFeatures { /* fields omitted */ }
Expand description
Information about the SVM features that the processory supports (LEAF=0x8000_000A).
Note
If SVM is not supported (ExtendedProcessorFeatureIdentifiers::has_svm is false), this leaf is reserved (crate::CpuId will return None in this case).
Platforms
✅ AMD ❌ Intel
Implementations
Number of available address space identifiers (ASID).
Nested paging supported if set.
Indicates support for LBR Virtualization.
Indicates support for SVM-Lock if set.
Indicates support for MSR TSC ratio (MSR 0xC000_0104
) if set.
Indicates support for VMCB clean bits if set.
Indicates that TLB flush events, including CR3 writes and CR4.PGE toggles, flush only the current ASID’s TLB entries.
Also indicates support for the extended VMCB TLB_Control.
Indicates support for the decode assists if set.
Indicates support for the pause intercept filter if set.
Indicates support for the PAUSE filter cycle count threshold if set.
Support for the AMD advanced virtual interrupt controller if set.
VMSAVE and VMLOAD virtualization supported if set.
SVM supervisor shadow stack restrictions if set.
SPEC_CTRL virtualization supported if set.
When host CR4.MCE=1
and guest CR4.MCE=0
, machine check exceptions (#MC
) in a
guest do not cause shutdown and are always intercepted if set.
Support for INVLPGB/TLBSYNC hypervisor enable in VMCB and TLBSYNC intercept if set.
Trait Implementations
This method tests for self
and other
values to be equal, and is used
by ==
. Read more
This method tests for !=
.