Struct raw_cpuid::ExtendedStateInfo[][src]

pub struct ExtendedStateInfo { /* fields omitted */ }
Expand description

Information for saving/restoring extended register state (LEAF=0x0D).

Platforms

✅ AMD ✅ Intel

Implementations

Support for legacy x87 in XCR0.

Support for SSE 128-bit in XCR0.

Support for AVX 256-bit in XCR0.

Support for MPX BNDREGS in XCR0.

Support for MPX BNDCSR in XCR0.

Support for AVX512 OPMASK in XCR0.

Support for AVX512 ZMM Hi256 XCR0.

Support for AVX512 ZMM Hi16 in XCR0.

Support for PKRU in XCR0.

Support for PT in IA32_XSS.

Support for HDC in IA32_XSS.

Maximum size (bytes, from the beginning of the XSAVE/XRSTOR save area) required by enabled features in XCR0. May be different than ECX if some features at the end of the XSAVE save area are not enabled.

Maximum size (bytes, from the beginning of the XSAVE/XRSTOR save area) of the XSAVE/XRSTOR save area required by all supported features in the processor, i.e all the valid bit fields in XCR0.

CPU has xsaveopt feature.

Supports XSAVEC and the compacted form of XRSTOR if set.

Supports XGETBV with ECX = 1 if set.

Supports XSAVES/XRSTORS and IA32_XSS if set.

The size in bytes of the XSAVE area containing all states enabled by XCRO | IA32_XSS.

Iterator over extended state enumeration levels >= 2.

Trait Implementations

Formats the value using the given formatter. Read more

Auto Trait Implementations

Blanket Implementations

Gets the TypeId of self. Read more

Immutably borrows from an owned value. Read more

Mutably borrows from an owned value. Read more

Performs the conversion.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.