ra6e1_pac/
ssie0.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.20.00, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:50:30 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Serial Sound Interface Enhanced (SSIE)"]
28unsafe impl ::core::marker::Send for super::Ssie0 {}
29unsafe impl ::core::marker::Sync for super::Ssie0 {}
30impl super::Ssie0 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Control Register"]
38    #[inline(always)]
39    pub const fn ssicr(&self) -> &'static crate::common::Reg<self::Ssicr_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Ssicr_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "Status Register"]
48    #[inline(always)]
49    pub const fn ssisr(&self) -> &'static crate::common::Reg<self::Ssisr_SPEC, crate::common::RW> {
50        unsafe {
51            crate::common::Reg::<self::Ssisr_SPEC, crate::common::RW>::from_ptr(
52                self._svd2pac_as_ptr().add(4usize),
53            )
54        }
55    }
56
57    #[doc = "FIFO Control Register"]
58    #[inline(always)]
59    pub const fn ssifcr(
60        &self,
61    ) -> &'static crate::common::Reg<self::Ssifcr_SPEC, crate::common::RW> {
62        unsafe {
63            crate::common::Reg::<self::Ssifcr_SPEC, crate::common::RW>::from_ptr(
64                self._svd2pac_as_ptr().add(16usize),
65            )
66        }
67    }
68
69    #[doc = "FIFO Status Register"]
70    #[inline(always)]
71    pub const fn ssifsr(
72        &self,
73    ) -> &'static crate::common::Reg<self::Ssifsr_SPEC, crate::common::RW> {
74        unsafe {
75            crate::common::Reg::<self::Ssifsr_SPEC, crate::common::RW>::from_ptr(
76                self._svd2pac_as_ptr().add(20usize),
77            )
78        }
79    }
80
81    #[doc = "Transmit FIFO Data Register"]
82    #[inline(always)]
83    pub const fn ssiftdr(
84        &self,
85    ) -> &'static crate::common::Reg<self::Ssiftdr_SPEC, crate::common::W> {
86        unsafe {
87            crate::common::Reg::<self::Ssiftdr_SPEC, crate::common::W>::from_ptr(
88                self._svd2pac_as_ptr().add(24usize),
89            )
90        }
91    }
92
93    #[doc = "Receive FIFO Data Register"]
94    #[inline(always)]
95    pub const fn ssifrdr(
96        &self,
97    ) -> &'static crate::common::Reg<self::Ssifrdr_SPEC, crate::common::R> {
98        unsafe {
99            crate::common::Reg::<self::Ssifrdr_SPEC, crate::common::R>::from_ptr(
100                self._svd2pac_as_ptr().add(28usize),
101            )
102        }
103    }
104
105    #[doc = "Audio Format Register"]
106    #[inline(always)]
107    pub const fn ssiofr(
108        &self,
109    ) -> &'static crate::common::Reg<self::Ssiofr_SPEC, crate::common::RW> {
110        unsafe {
111            crate::common::Reg::<self::Ssiofr_SPEC, crate::common::RW>::from_ptr(
112                self._svd2pac_as_ptr().add(32usize),
113            )
114        }
115    }
116
117    #[doc = "Status Control Register"]
118    #[inline(always)]
119    pub const fn ssiscr(
120        &self,
121    ) -> &'static crate::common::Reg<self::Ssiscr_SPEC, crate::common::RW> {
122        unsafe {
123            crate::common::Reg::<self::Ssiscr_SPEC, crate::common::RW>::from_ptr(
124                self._svd2pac_as_ptr().add(36usize),
125            )
126        }
127    }
128}
129#[doc(hidden)]
130#[derive(Copy, Clone, Eq, PartialEq)]
131pub struct Ssicr_SPEC;
132impl crate::sealed::RegSpec for Ssicr_SPEC {
133    type DataType = u32;
134}
135
136#[doc = "Control Register"]
137pub type Ssicr = crate::RegValueT<Ssicr_SPEC>;
138
139impl Ssicr {
140    #[doc = "Reception Enable"]
141    #[inline(always)]
142    pub fn ren(
143        self,
144    ) -> crate::common::RegisterField<
145        0,
146        0x1,
147        1,
148        0,
149        ssicr::Ren,
150        ssicr::Ren,
151        Ssicr_SPEC,
152        crate::common::RW,
153    > {
154        crate::common::RegisterField::<
155            0,
156            0x1,
157            1,
158            0,
159            ssicr::Ren,
160            ssicr::Ren,
161            Ssicr_SPEC,
162            crate::common::RW,
163        >::from_register(self, 0)
164    }
165
166    #[doc = "Transmission Enable"]
167    #[inline(always)]
168    pub fn ten(
169        self,
170    ) -> crate::common::RegisterField<
171        1,
172        0x1,
173        1,
174        0,
175        ssicr::Ten,
176        ssicr::Ten,
177        Ssicr_SPEC,
178        crate::common::RW,
179    > {
180        crate::common::RegisterField::<
181            1,
182            0x1,
183            1,
184            0,
185            ssicr::Ten,
186            ssicr::Ten,
187            Ssicr_SPEC,
188            crate::common::RW,
189        >::from_register(self, 0)
190    }
191
192    #[doc = "Mute Enable"]
193    #[inline(always)]
194    pub fn muen(
195        self,
196    ) -> crate::common::RegisterField<
197        3,
198        0x1,
199        1,
200        0,
201        ssicr::Muen,
202        ssicr::Muen,
203        Ssicr_SPEC,
204        crate::common::RW,
205    > {
206        crate::common::RegisterField::<
207            3,
208            0x1,
209            1,
210            0,
211            ssicr::Muen,
212            ssicr::Muen,
213            Ssicr_SPEC,
214            crate::common::RW,
215        >::from_register(self, 0)
216    }
217
218    #[doc = "Selects Bit Clock Division Ratio"]
219    #[inline(always)]
220    pub fn ckdv(
221        self,
222    ) -> crate::common::RegisterField<
223        4,
224        0xf,
225        1,
226        0,
227        ssicr::Ckdv,
228        ssicr::Ckdv,
229        Ssicr_SPEC,
230        crate::common::RW,
231    > {
232        crate::common::RegisterField::<
233            4,
234            0xf,
235            1,
236            0,
237            ssicr::Ckdv,
238            ssicr::Ckdv,
239            Ssicr_SPEC,
240            crate::common::RW,
241        >::from_register(self, 0)
242    }
243
244    #[doc = "Selects Serial Data Delay"]
245    #[inline(always)]
246    pub fn del(
247        self,
248    ) -> crate::common::RegisterField<
249        8,
250        0x1,
251        1,
252        0,
253        ssicr::Del,
254        ssicr::Del,
255        Ssicr_SPEC,
256        crate::common::RW,
257    > {
258        crate::common::RegisterField::<
259            8,
260            0x1,
261            1,
262            0,
263            ssicr::Del,
264            ssicr::Del,
265            Ssicr_SPEC,
266            crate::common::RW,
267        >::from_register(self, 0)
268    }
269
270    #[doc = "Selects Placement Data Alignment"]
271    #[inline(always)]
272    pub fn pdta(
273        self,
274    ) -> crate::common::RegisterField<
275        9,
276        0x1,
277        1,
278        0,
279        ssicr::Pdta,
280        ssicr::Pdta,
281        Ssicr_SPEC,
282        crate::common::RW,
283    > {
284        crate::common::RegisterField::<
285            9,
286            0x1,
287            1,
288            0,
289            ssicr::Pdta,
290            ssicr::Pdta,
291            Ssicr_SPEC,
292            crate::common::RW,
293        >::from_register(self, 0)
294    }
295
296    #[doc = "Selects Serial Data Alignment"]
297    #[inline(always)]
298    pub fn sdta(
299        self,
300    ) -> crate::common::RegisterField<
301        10,
302        0x1,
303        1,
304        0,
305        ssicr::Sdta,
306        ssicr::Sdta,
307        Ssicr_SPEC,
308        crate::common::RW,
309    > {
310        crate::common::RegisterField::<
311            10,
312            0x1,
313            1,
314            0,
315            ssicr::Sdta,
316            ssicr::Sdta,
317            Ssicr_SPEC,
318            crate::common::RW,
319        >::from_register(self, 0)
320    }
321
322    #[doc = "Selects Serial Padding Polarity"]
323    #[inline(always)]
324    pub fn spdp(
325        self,
326    ) -> crate::common::RegisterField<
327        11,
328        0x1,
329        1,
330        0,
331        ssicr::Spdp,
332        ssicr::Spdp,
333        Ssicr_SPEC,
334        crate::common::RW,
335    > {
336        crate::common::RegisterField::<
337            11,
338            0x1,
339            1,
340            0,
341            ssicr::Spdp,
342            ssicr::Spdp,
343            Ssicr_SPEC,
344            crate::common::RW,
345        >::from_register(self, 0)
346    }
347
348    #[doc = "Selects the Initial Value and Polarity of LR Clock/Frame Synchronization Signal"]
349    #[inline(always)]
350    pub fn lrckp(
351        self,
352    ) -> crate::common::RegisterField<
353        12,
354        0x1,
355        1,
356        0,
357        ssicr::Lrckp,
358        ssicr::Lrckp,
359        Ssicr_SPEC,
360        crate::common::RW,
361    > {
362        crate::common::RegisterField::<
363            12,
364            0x1,
365            1,
366            0,
367            ssicr::Lrckp,
368            ssicr::Lrckp,
369            Ssicr_SPEC,
370            crate::common::RW,
371        >::from_register(self, 0)
372    }
373
374    #[doc = "Selects Bit Clock Polarity"]
375    #[inline(always)]
376    pub fn bckp(
377        self,
378    ) -> crate::common::RegisterField<
379        13,
380        0x1,
381        1,
382        0,
383        ssicr::Bckp,
384        ssicr::Bckp,
385        Ssicr_SPEC,
386        crate::common::RW,
387    > {
388        crate::common::RegisterField::<
389            13,
390            0x1,
391            1,
392            0,
393            ssicr::Bckp,
394            ssicr::Bckp,
395            Ssicr_SPEC,
396            crate::common::RW,
397        >::from_register(self, 0)
398    }
399
400    #[doc = "Master Enable"]
401    #[inline(always)]
402    pub fn mst(
403        self,
404    ) -> crate::common::RegisterField<
405        14,
406        0x1,
407        1,
408        0,
409        ssicr::Mst,
410        ssicr::Mst,
411        Ssicr_SPEC,
412        crate::common::RW,
413    > {
414        crate::common::RegisterField::<
415            14,
416            0x1,
417            1,
418            0,
419            ssicr::Mst,
420            ssicr::Mst,
421            Ssicr_SPEC,
422            crate::common::RW,
423        >::from_register(self, 0)
424    }
425
426    #[doc = "Selects System Word Length"]
427    #[inline(always)]
428    pub fn swl(
429        self,
430    ) -> crate::common::RegisterField<
431        16,
432        0x7,
433        1,
434        0,
435        ssicr::Swl,
436        ssicr::Swl,
437        Ssicr_SPEC,
438        crate::common::RW,
439    > {
440        crate::common::RegisterField::<
441            16,
442            0x7,
443            1,
444            0,
445            ssicr::Swl,
446            ssicr::Swl,
447            Ssicr_SPEC,
448            crate::common::RW,
449        >::from_register(self, 0)
450    }
451
452    #[doc = "Selects Data Word Length"]
453    #[inline(always)]
454    pub fn dwl(
455        self,
456    ) -> crate::common::RegisterField<
457        19,
458        0x7,
459        1,
460        0,
461        ssicr::Dwl,
462        ssicr::Dwl,
463        Ssicr_SPEC,
464        crate::common::RW,
465    > {
466        crate::common::RegisterField::<
467            19,
468            0x7,
469            1,
470            0,
471            ssicr::Dwl,
472            ssicr::Dwl,
473            Ssicr_SPEC,
474            crate::common::RW,
475        >::from_register(self, 0)
476    }
477
478    #[doc = "Selects Frame Word Number"]
479    #[inline(always)]
480    pub fn frm(
481        self,
482    ) -> crate::common::RegisterField<22, 0x3, 1, 0, u8, u8, Ssicr_SPEC, crate::common::RW> {
483        crate::common::RegisterField::<22,0x3,1,0,u8,u8,Ssicr_SPEC,crate::common::RW>::from_register(self,0)
484    }
485
486    #[doc = "Idle Mode Interrupt Output Enable"]
487    #[inline(always)]
488    pub fn iien(
489        self,
490    ) -> crate::common::RegisterField<
491        25,
492        0x1,
493        1,
494        0,
495        ssicr::Iien,
496        ssicr::Iien,
497        Ssicr_SPEC,
498        crate::common::RW,
499    > {
500        crate::common::RegisterField::<
501            25,
502            0x1,
503            1,
504            0,
505            ssicr::Iien,
506            ssicr::Iien,
507            Ssicr_SPEC,
508            crate::common::RW,
509        >::from_register(self, 0)
510    }
511
512    #[doc = "Receive Overflow Interrupt Output Enable"]
513    #[inline(always)]
514    pub fn roien(
515        self,
516    ) -> crate::common::RegisterField<
517        26,
518        0x1,
519        1,
520        0,
521        ssicr::Roien,
522        ssicr::Roien,
523        Ssicr_SPEC,
524        crate::common::RW,
525    > {
526        crate::common::RegisterField::<
527            26,
528            0x1,
529            1,
530            0,
531            ssicr::Roien,
532            ssicr::Roien,
533            Ssicr_SPEC,
534            crate::common::RW,
535        >::from_register(self, 0)
536    }
537
538    #[doc = "Receive Underflow Interrupt Output Enable"]
539    #[inline(always)]
540    pub fn ruien(
541        self,
542    ) -> crate::common::RegisterField<
543        27,
544        0x1,
545        1,
546        0,
547        ssicr::Ruien,
548        ssicr::Ruien,
549        Ssicr_SPEC,
550        crate::common::RW,
551    > {
552        crate::common::RegisterField::<
553            27,
554            0x1,
555            1,
556            0,
557            ssicr::Ruien,
558            ssicr::Ruien,
559            Ssicr_SPEC,
560            crate::common::RW,
561        >::from_register(self, 0)
562    }
563
564    #[doc = "Transmit Overflow Interrupt Output Enable"]
565    #[inline(always)]
566    pub fn toien(
567        self,
568    ) -> crate::common::RegisterField<
569        28,
570        0x1,
571        1,
572        0,
573        ssicr::Toien,
574        ssicr::Toien,
575        Ssicr_SPEC,
576        crate::common::RW,
577    > {
578        crate::common::RegisterField::<
579            28,
580            0x1,
581            1,
582            0,
583            ssicr::Toien,
584            ssicr::Toien,
585            Ssicr_SPEC,
586            crate::common::RW,
587        >::from_register(self, 0)
588    }
589
590    #[doc = "Transmit Underflow Interrupt Output Enable"]
591    #[inline(always)]
592    pub fn tuien(
593        self,
594    ) -> crate::common::RegisterField<
595        29,
596        0x1,
597        1,
598        0,
599        ssicr::Tuien,
600        ssicr::Tuien,
601        Ssicr_SPEC,
602        crate::common::RW,
603    > {
604        crate::common::RegisterField::<
605            29,
606            0x1,
607            1,
608            0,
609            ssicr::Tuien,
610            ssicr::Tuien,
611            Ssicr_SPEC,
612            crate::common::RW,
613        >::from_register(self, 0)
614    }
615}
616impl ::core::default::Default for Ssicr {
617    #[inline(always)]
618    fn default() -> Ssicr {
619        <crate::RegValueT<Ssicr_SPEC> as RegisterValue<_>>::new(0)
620    }
621}
622pub mod ssicr {
623
624    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
625    pub struct Ren_SPEC;
626    pub type Ren = crate::EnumBitfieldStruct<u8, Ren_SPEC>;
627    impl Ren {
628        #[doc = "Disables reception"]
629        pub const _0: Self = Self::new(0);
630
631        #[doc = "Enables reception (starts reception)"]
632        pub const _1: Self = Self::new(1);
633    }
634    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
635    pub struct Ten_SPEC;
636    pub type Ten = crate::EnumBitfieldStruct<u8, Ten_SPEC>;
637    impl Ten {
638        #[doc = "Disables transmission"]
639        pub const _0: Self = Self::new(0);
640
641        #[doc = "Enables transmission (starts transmission)"]
642        pub const _1: Self = Self::new(1);
643    }
644    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
645    pub struct Muen_SPEC;
646    pub type Muen = crate::EnumBitfieldStruct<u8, Muen_SPEC>;
647    impl Muen {
648        #[doc = "Disables muting on the next frame boundary"]
649        pub const _0: Self = Self::new(0);
650
651        #[doc = "Enables muting on the next frame boundary"]
652        pub const _1: Self = Self::new(1);
653    }
654    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
655    pub struct Ckdv_SPEC;
656    pub type Ckdv = crate::EnumBitfieldStruct<u8, Ckdv_SPEC>;
657    impl Ckdv {
658        #[doc = "AUDIO_MCK"]
659        pub const _0_X_0: Self = Self::new(0);
660
661        #[doc = "AUDIO_MCK/2"]
662        pub const _0_X_1: Self = Self::new(1);
663
664        #[doc = "AUDIO_MCK/4"]
665        pub const _0_X_2: Self = Self::new(2);
666
667        #[doc = "AUDIO_MCK/8"]
668        pub const _0_X_3: Self = Self::new(3);
669
670        #[doc = "AUDIO_MCK/16"]
671        pub const _0_X_4: Self = Self::new(4);
672
673        #[doc = "AUDIO_MCK/32"]
674        pub const _0_X_5: Self = Self::new(5);
675
676        #[doc = "AUDIO_MCK/64"]
677        pub const _0_X_6: Self = Self::new(6);
678
679        #[doc = "AUDIO_MCK/128"]
680        pub const _0_X_7: Self = Self::new(7);
681
682        #[doc = "AUDIO_MCK/6"]
683        pub const _0_X_8: Self = Self::new(8);
684
685        #[doc = "AUDIO_MCK/12"]
686        pub const _0_X_9: Self = Self::new(9);
687
688        #[doc = "AUDIO_MCK/24"]
689        pub const _0_X_A: Self = Self::new(10);
690
691        #[doc = "AUDIO_MCK/48"]
692        pub const _0_X_B: Self = Self::new(11);
693
694        #[doc = "AUDIO_MCK/96"]
695        pub const _0_X_C: Self = Self::new(12);
696
697        #[doc = "Setting prohibited"]
698        pub const OTHERS: Self = Self::new(0);
699    }
700    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
701    pub struct Del_SPEC;
702    pub type Del = crate::EnumBitfieldStruct<u8, Del_SPEC>;
703    impl Del {
704        #[doc = "Delay of 1 cycle of SSIBCK0 between SSILRCK0/SSIFS0 and SSITXD0/SSIRXD0/SSIDATA0"]
705        pub const _0: Self = Self::new(0);
706
707        #[doc = "No delay between SSILRCK0/SSIFS0 and SSITXD0/SSIRXD0/SSIDATA0"]
708        pub const _1: Self = Self::new(1);
709    }
710    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
711    pub struct Pdta_SPEC;
712    pub type Pdta = crate::EnumBitfieldStruct<u8, Pdta_SPEC>;
713    impl Pdta {
714        #[doc = "Left-justifies placement data (SSIFTDR, SSIFRDR)"]
715        pub const _0: Self = Self::new(0);
716
717        #[doc = "Right-justifies placement data (SSIFTDR, SSIFRDR)"]
718        pub const _1: Self = Self::new(1);
719    }
720    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
721    pub struct Sdta_SPEC;
722    pub type Sdta = crate::EnumBitfieldStruct<u8, Sdta_SPEC>;
723    impl Sdta {
724        #[doc = "Transmits and receives serial data first and then padding bits"]
725        pub const _0: Self = Self::new(0);
726
727        #[doc = "Transmit and receives padding bits first and then serial data"]
728        pub const _1: Self = Self::new(1);
729    }
730    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
731    pub struct Spdp_SPEC;
732    pub type Spdp = crate::EnumBitfieldStruct<u8, Spdp_SPEC>;
733    impl Spdp {
734        #[doc = "Padding data is at a low level"]
735        pub const _0: Self = Self::new(0);
736
737        #[doc = "Padding data is at a high level"]
738        pub const _1: Self = Self::new(1);
739    }
740    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
741    pub struct Lrckp_SPEC;
742    pub type Lrckp = crate::EnumBitfieldStruct<u8, Lrckp_SPEC>;
743    impl Lrckp {
744        #[doc = "The initial value is at a high level. The start trigger for a frame is synchronized with a falling edge of SSILRCK0/SSIFS0."]
745        pub const _0: Self = Self::new(0);
746
747        #[doc = "The initial value is at a low level. The start trigger for a frame is synchronized with a rising edge of SSILRCK0/SSIFS0."]
748        pub const _1: Self = Self::new(1);
749    }
750    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
751    pub struct Bckp_SPEC;
752    pub type Bckp = crate::EnumBitfieldStruct<u8, Bckp_SPEC>;
753    impl Bckp {
754        #[doc = "SSILRCK0/SSIFS0 and SSITXD0/SSIRXD0/SSIDATA0 change at a falling edge (SSILRCK0/SSIFS0 and SSIRXD0/SSIDATA0 are sampled at a rising edge of SSIBCK0)."]
755        pub const _0: Self = Self::new(0);
756
757        #[doc = "SSILRCK0/SSIFS0 and SSITXD0/SSIRXD0/SSIDATA0 change at a rising edge (SSILRCK0/SSIFS0 and SSIRXD0/SSIDATA0 are sampled at a falling edge of SSIBCK0)."]
758        pub const _1: Self = Self::new(1);
759    }
760    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
761    pub struct Mst_SPEC;
762    pub type Mst = crate::EnumBitfieldStruct<u8, Mst_SPEC>;
763    impl Mst {
764        #[doc = "Slave-mode communication"]
765        pub const _0: Self = Self::new(0);
766
767        #[doc = "Master-mode communication"]
768        pub const _1: Self = Self::new(1);
769    }
770    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
771    pub struct Swl_SPEC;
772    pub type Swl = crate::EnumBitfieldStruct<u8, Swl_SPEC>;
773    impl Swl {
774        #[doc = "8 bits"]
775        pub const _000: Self = Self::new(0);
776
777        #[doc = "16 bits"]
778        pub const _001: Self = Self::new(1);
779
780        #[doc = "24 bits"]
781        pub const _010: Self = Self::new(2);
782
783        #[doc = "32 bits"]
784        pub const _011: Self = Self::new(3);
785
786        #[doc = "48 bits"]
787        pub const _100: Self = Self::new(4);
788
789        #[doc = "64 bits"]
790        pub const _101: Self = Self::new(5);
791
792        #[doc = "128 bits"]
793        pub const _110: Self = Self::new(6);
794
795        #[doc = "256 bits"]
796        pub const _111: Self = Self::new(7);
797    }
798    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
799    pub struct Dwl_SPEC;
800    pub type Dwl = crate::EnumBitfieldStruct<u8, Dwl_SPEC>;
801    impl Dwl {
802        #[doc = "8 bits"]
803        pub const _000: Self = Self::new(0);
804
805        #[doc = "16 bits"]
806        pub const _001: Self = Self::new(1);
807
808        #[doc = "18 bits"]
809        pub const _010: Self = Self::new(2);
810
811        #[doc = "20 bits"]
812        pub const _011: Self = Self::new(3);
813
814        #[doc = "22 bits"]
815        pub const _100: Self = Self::new(4);
816
817        #[doc = "24 bits"]
818        pub const _101: Self = Self::new(5);
819
820        #[doc = "32 bits"]
821        pub const _110: Self = Self::new(6);
822
823        #[doc = "Setting prohibited"]
824        pub const _111: Self = Self::new(7);
825    }
826    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
827    pub struct Iien_SPEC;
828    pub type Iien = crate::EnumBitfieldStruct<u8, Iien_SPEC>;
829    impl Iien {
830        #[doc = "Disables idle mode interrupt output"]
831        pub const _0: Self = Self::new(0);
832
833        #[doc = "Enables idle mode interrupt output"]
834        pub const _1: Self = Self::new(1);
835    }
836    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
837    pub struct Roien_SPEC;
838    pub type Roien = crate::EnumBitfieldStruct<u8, Roien_SPEC>;
839    impl Roien {
840        #[doc = "Disables receive overflow interrupt output"]
841        pub const _0: Self = Self::new(0);
842
843        #[doc = "Enables receive overflow interrupt output"]
844        pub const _1: Self = Self::new(1);
845    }
846    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
847    pub struct Ruien_SPEC;
848    pub type Ruien = crate::EnumBitfieldStruct<u8, Ruien_SPEC>;
849    impl Ruien {
850        #[doc = "Disables receive underflow interrupt output"]
851        pub const _0: Self = Self::new(0);
852
853        #[doc = "Enables receive underflow interrupt output"]
854        pub const _1: Self = Self::new(1);
855    }
856    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
857    pub struct Toien_SPEC;
858    pub type Toien = crate::EnumBitfieldStruct<u8, Toien_SPEC>;
859    impl Toien {
860        #[doc = "Disables transmit overflow interrupt output"]
861        pub const _0: Self = Self::new(0);
862
863        #[doc = "Enables transmit overflow interrupt output"]
864        pub const _1: Self = Self::new(1);
865    }
866    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
867    pub struct Tuien_SPEC;
868    pub type Tuien = crate::EnumBitfieldStruct<u8, Tuien_SPEC>;
869    impl Tuien {
870        #[doc = "Disables transmit underflow interrupt output"]
871        pub const _0: Self = Self::new(0);
872
873        #[doc = "Enables transmit underflow interrupt output"]
874        pub const _1: Self = Self::new(1);
875    }
876}
877#[doc(hidden)]
878#[derive(Copy, Clone, Eq, PartialEq)]
879pub struct Ssisr_SPEC;
880impl crate::sealed::RegSpec for Ssisr_SPEC {
881    type DataType = u32;
882}
883
884#[doc = "Status Register"]
885pub type Ssisr = crate::RegValueT<Ssisr_SPEC>;
886
887impl Ssisr {
888    #[doc = "Idle Mode Status Flag"]
889    #[inline(always)]
890    pub fn iirq(
891        self,
892    ) -> crate::common::RegisterField<
893        25,
894        0x1,
895        1,
896        0,
897        ssisr::Iirq,
898        ssisr::Iirq,
899        Ssisr_SPEC,
900        crate::common::R,
901    > {
902        crate::common::RegisterField::<
903            25,
904            0x1,
905            1,
906            0,
907            ssisr::Iirq,
908            ssisr::Iirq,
909            Ssisr_SPEC,
910            crate::common::R,
911        >::from_register(self, 0)
912    }
913
914    #[doc = "Receive Overflow Error Status Flag"]
915    #[inline(always)]
916    pub fn roirq(
917        self,
918    ) -> crate::common::RegisterField<
919        26,
920        0x1,
921        1,
922        0,
923        ssisr::Roirq,
924        ssisr::Roirq,
925        Ssisr_SPEC,
926        crate::common::RW,
927    > {
928        crate::common::RegisterField::<
929            26,
930            0x1,
931            1,
932            0,
933            ssisr::Roirq,
934            ssisr::Roirq,
935            Ssisr_SPEC,
936            crate::common::RW,
937        >::from_register(self, 0)
938    }
939
940    #[doc = "Receive Underflow Error Status Flag"]
941    #[inline(always)]
942    pub fn ruirq(
943        self,
944    ) -> crate::common::RegisterField<
945        27,
946        0x1,
947        1,
948        0,
949        ssisr::Ruirq,
950        ssisr::Ruirq,
951        Ssisr_SPEC,
952        crate::common::RW,
953    > {
954        crate::common::RegisterField::<
955            27,
956            0x1,
957            1,
958            0,
959            ssisr::Ruirq,
960            ssisr::Ruirq,
961            Ssisr_SPEC,
962            crate::common::RW,
963        >::from_register(self, 0)
964    }
965
966    #[doc = "Transmit Overflow Error Status Flag"]
967    #[inline(always)]
968    pub fn toirq(
969        self,
970    ) -> crate::common::RegisterField<
971        28,
972        0x1,
973        1,
974        0,
975        ssisr::Toirq,
976        ssisr::Toirq,
977        Ssisr_SPEC,
978        crate::common::RW,
979    > {
980        crate::common::RegisterField::<
981            28,
982            0x1,
983            1,
984            0,
985            ssisr::Toirq,
986            ssisr::Toirq,
987            Ssisr_SPEC,
988            crate::common::RW,
989        >::from_register(self, 0)
990    }
991
992    #[doc = "Transmit Underflow Error Status flag"]
993    #[inline(always)]
994    pub fn tuirq(
995        self,
996    ) -> crate::common::RegisterField<
997        29,
998        0x1,
999        1,
1000        0,
1001        ssisr::Tuirq,
1002        ssisr::Tuirq,
1003        Ssisr_SPEC,
1004        crate::common::RW,
1005    > {
1006        crate::common::RegisterField::<
1007            29,
1008            0x1,
1009            1,
1010            0,
1011            ssisr::Tuirq,
1012            ssisr::Tuirq,
1013            Ssisr_SPEC,
1014            crate::common::RW,
1015        >::from_register(self, 0)
1016    }
1017}
1018impl ::core::default::Default for Ssisr {
1019    #[inline(always)]
1020    fn default() -> Ssisr {
1021        <crate::RegValueT<Ssisr_SPEC> as RegisterValue<_>>::new(33554432)
1022    }
1023}
1024pub mod ssisr {
1025
1026    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1027    pub struct Iirq_SPEC;
1028    pub type Iirq = crate::EnumBitfieldStruct<u8, Iirq_SPEC>;
1029    impl Iirq {
1030        #[doc = "In the communication state"]
1031        pub const _0: Self = Self::new(0);
1032
1033        #[doc = "In the idle state"]
1034        pub const _1: Self = Self::new(1);
1035    }
1036    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1037    pub struct Roirq_SPEC;
1038    pub type Roirq = crate::EnumBitfieldStruct<u8, Roirq_SPEC>;
1039    impl Roirq {
1040        #[doc = "No receive overflow error is generated."]
1041        pub const _0: Self = Self::new(0);
1042
1043        #[doc = "A receive overflow error is generated."]
1044        pub const _1: Self = Self::new(1);
1045    }
1046    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1047    pub struct Ruirq_SPEC;
1048    pub type Ruirq = crate::EnumBitfieldStruct<u8, Ruirq_SPEC>;
1049    impl Ruirq {
1050        #[doc = "No receive underflow error is generated."]
1051        pub const _0: Self = Self::new(0);
1052
1053        #[doc = "A receive underflow error is generated."]
1054        pub const _1: Self = Self::new(1);
1055    }
1056    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1057    pub struct Toirq_SPEC;
1058    pub type Toirq = crate::EnumBitfieldStruct<u8, Toirq_SPEC>;
1059    impl Toirq {
1060        #[doc = "No transmit overflow error is generated."]
1061        pub const _0: Self = Self::new(0);
1062
1063        #[doc = "A transmit overflow error is generated."]
1064        pub const _1: Self = Self::new(1);
1065    }
1066    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1067    pub struct Tuirq_SPEC;
1068    pub type Tuirq = crate::EnumBitfieldStruct<u8, Tuirq_SPEC>;
1069    impl Tuirq {
1070        #[doc = "No transmit underflow error is generated."]
1071        pub const _0: Self = Self::new(0);
1072
1073        #[doc = "A transmit underflow error is generated."]
1074        pub const _1: Self = Self::new(1);
1075    }
1076}
1077#[doc(hidden)]
1078#[derive(Copy, Clone, Eq, PartialEq)]
1079pub struct Ssifcr_SPEC;
1080impl crate::sealed::RegSpec for Ssifcr_SPEC {
1081    type DataType = u32;
1082}
1083
1084#[doc = "FIFO Control Register"]
1085pub type Ssifcr = crate::RegValueT<Ssifcr_SPEC>;
1086
1087impl Ssifcr {
1088    #[doc = "Receive FIFO Data Register Reset"]
1089    #[inline(always)]
1090    pub fn rfrst(
1091        self,
1092    ) -> crate::common::RegisterField<
1093        0,
1094        0x1,
1095        1,
1096        0,
1097        ssifcr::Rfrst,
1098        ssifcr::Rfrst,
1099        Ssifcr_SPEC,
1100        crate::common::RW,
1101    > {
1102        crate::common::RegisterField::<
1103            0,
1104            0x1,
1105            1,
1106            0,
1107            ssifcr::Rfrst,
1108            ssifcr::Rfrst,
1109            Ssifcr_SPEC,
1110            crate::common::RW,
1111        >::from_register(self, 0)
1112    }
1113
1114    #[doc = "Transmit FIFO Data Register Reset"]
1115    #[inline(always)]
1116    pub fn tfrst(
1117        self,
1118    ) -> crate::common::RegisterField<
1119        1,
1120        0x1,
1121        1,
1122        0,
1123        ssifcr::Tfrst,
1124        ssifcr::Tfrst,
1125        Ssifcr_SPEC,
1126        crate::common::RW,
1127    > {
1128        crate::common::RegisterField::<
1129            1,
1130            0x1,
1131            1,
1132            0,
1133            ssifcr::Tfrst,
1134            ssifcr::Tfrst,
1135            Ssifcr_SPEC,
1136            crate::common::RW,
1137        >::from_register(self, 0)
1138    }
1139
1140    #[doc = "Receive Data Full Interrupt Output Enable"]
1141    #[inline(always)]
1142    pub fn rie(
1143        self,
1144    ) -> crate::common::RegisterField<
1145        2,
1146        0x1,
1147        1,
1148        0,
1149        ssifcr::Rie,
1150        ssifcr::Rie,
1151        Ssifcr_SPEC,
1152        crate::common::RW,
1153    > {
1154        crate::common::RegisterField::<
1155            2,
1156            0x1,
1157            1,
1158            0,
1159            ssifcr::Rie,
1160            ssifcr::Rie,
1161            Ssifcr_SPEC,
1162            crate::common::RW,
1163        >::from_register(self, 0)
1164    }
1165
1166    #[doc = "Transmit Data Empty Interrupt Output Enable"]
1167    #[inline(always)]
1168    pub fn tie(
1169        self,
1170    ) -> crate::common::RegisterField<
1171        3,
1172        0x1,
1173        1,
1174        0,
1175        ssifcr::Tie,
1176        ssifcr::Tie,
1177        Ssifcr_SPEC,
1178        crate::common::RW,
1179    > {
1180        crate::common::RegisterField::<
1181            3,
1182            0x1,
1183            1,
1184            0,
1185            ssifcr::Tie,
1186            ssifcr::Tie,
1187            Ssifcr_SPEC,
1188            crate::common::RW,
1189        >::from_register(self, 0)
1190    }
1191
1192    #[doc = "Byte Swap Enable"]
1193    #[inline(always)]
1194    pub fn bsw(
1195        self,
1196    ) -> crate::common::RegisterField<
1197        11,
1198        0x1,
1199        1,
1200        0,
1201        ssifcr::Bsw,
1202        ssifcr::Bsw,
1203        Ssifcr_SPEC,
1204        crate::common::RW,
1205    > {
1206        crate::common::RegisterField::<
1207            11,
1208            0x1,
1209            1,
1210            0,
1211            ssifcr::Bsw,
1212            ssifcr::Bsw,
1213            Ssifcr_SPEC,
1214            crate::common::RW,
1215        >::from_register(self, 0)
1216    }
1217
1218    #[doc = "Software Reset"]
1219    #[inline(always)]
1220    pub fn ssirst(
1221        self,
1222    ) -> crate::common::RegisterField<
1223        16,
1224        0x1,
1225        1,
1226        0,
1227        ssifcr::Ssirst,
1228        ssifcr::Ssirst,
1229        Ssifcr_SPEC,
1230        crate::common::RW,
1231    > {
1232        crate::common::RegisterField::<
1233            16,
1234            0x1,
1235            1,
1236            0,
1237            ssifcr::Ssirst,
1238            ssifcr::Ssirst,
1239            Ssifcr_SPEC,
1240            crate::common::RW,
1241        >::from_register(self, 0)
1242    }
1243
1244    #[doc = "AUDIO_MCK Enable in Master-mode Communication"]
1245    #[inline(always)]
1246    pub fn aucke(
1247        self,
1248    ) -> crate::common::RegisterField<
1249        31,
1250        0x1,
1251        1,
1252        0,
1253        ssifcr::Aucke,
1254        ssifcr::Aucke,
1255        Ssifcr_SPEC,
1256        crate::common::RW,
1257    > {
1258        crate::common::RegisterField::<
1259            31,
1260            0x1,
1261            1,
1262            0,
1263            ssifcr::Aucke,
1264            ssifcr::Aucke,
1265            Ssifcr_SPEC,
1266            crate::common::RW,
1267        >::from_register(self, 0)
1268    }
1269}
1270impl ::core::default::Default for Ssifcr {
1271    #[inline(always)]
1272    fn default() -> Ssifcr {
1273        <crate::RegValueT<Ssifcr_SPEC> as RegisterValue<_>>::new(0)
1274    }
1275}
1276pub mod ssifcr {
1277
1278    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1279    pub struct Rfrst_SPEC;
1280    pub type Rfrst = crate::EnumBitfieldStruct<u8, Rfrst_SPEC>;
1281    impl Rfrst {
1282        #[doc = "Clears a receive data FIFO reset condition"]
1283        pub const _0: Self = Self::new(0);
1284
1285        #[doc = "Sets a receive data FIFO reset condition"]
1286        pub const _1: Self = Self::new(1);
1287    }
1288    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1289    pub struct Tfrst_SPEC;
1290    pub type Tfrst = crate::EnumBitfieldStruct<u8, Tfrst_SPEC>;
1291    impl Tfrst {
1292        #[doc = "Clears a transmit data FIFO reset condition"]
1293        pub const _0: Self = Self::new(0);
1294
1295        #[doc = "Sets a transmit data FIFO reset condition"]
1296        pub const _1: Self = Self::new(1);
1297    }
1298    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1299    pub struct Rie_SPEC;
1300    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
1301    impl Rie {
1302        #[doc = "Disables receive data full interrupts"]
1303        pub const _0: Self = Self::new(0);
1304
1305        #[doc = "Enables receive data full interrupts"]
1306        pub const _1: Self = Self::new(1);
1307    }
1308    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1309    pub struct Tie_SPEC;
1310    pub type Tie = crate::EnumBitfieldStruct<u8, Tie_SPEC>;
1311    impl Tie {
1312        #[doc = "Disables transmit data empty interrupts"]
1313        pub const _0: Self = Self::new(0);
1314
1315        #[doc = "Enables transmit data empty interrupts"]
1316        pub const _1: Self = Self::new(1);
1317    }
1318    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1319    pub struct Bsw_SPEC;
1320    pub type Bsw = crate::EnumBitfieldStruct<u8, Bsw_SPEC>;
1321    impl Bsw {
1322        #[doc = "Disables byte swap"]
1323        pub const _0: Self = Self::new(0);
1324
1325        #[doc = "Enables byte swap"]
1326        pub const _1: Self = Self::new(1);
1327    }
1328    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1329    pub struct Ssirst_SPEC;
1330    pub type Ssirst = crate::EnumBitfieldStruct<u8, Ssirst_SPEC>;
1331    impl Ssirst {
1332        #[doc = "Clears a software reset condition"]
1333        pub const _0: Self = Self::new(0);
1334
1335        #[doc = "Sets a software reset condition"]
1336        pub const _1: Self = Self::new(1);
1337    }
1338    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1339    pub struct Aucke_SPEC;
1340    pub type Aucke = crate::EnumBitfieldStruct<u8, Aucke_SPEC>;
1341    impl Aucke {
1342        #[doc = "Disables supply of AUDIO_MCK"]
1343        pub const _0: Self = Self::new(0);
1344
1345        #[doc = "Enables supply of AUDIO_MCK"]
1346        pub const _1: Self = Self::new(1);
1347    }
1348}
1349#[doc(hidden)]
1350#[derive(Copy, Clone, Eq, PartialEq)]
1351pub struct Ssifsr_SPEC;
1352impl crate::sealed::RegSpec for Ssifsr_SPEC {
1353    type DataType = u32;
1354}
1355
1356#[doc = "FIFO Status Register"]
1357pub type Ssifsr = crate::RegValueT<Ssifsr_SPEC>;
1358
1359impl Ssifsr {
1360    #[doc = "Receive Data Full Flag"]
1361    #[inline(always)]
1362    pub fn rdf(
1363        self,
1364    ) -> crate::common::RegisterField<
1365        0,
1366        0x1,
1367        1,
1368        0,
1369        ssifsr::Rdf,
1370        ssifsr::Rdf,
1371        Ssifsr_SPEC,
1372        crate::common::RW,
1373    > {
1374        crate::common::RegisterField::<
1375            0,
1376            0x1,
1377            1,
1378            0,
1379            ssifsr::Rdf,
1380            ssifsr::Rdf,
1381            Ssifsr_SPEC,
1382            crate::common::RW,
1383        >::from_register(self, 0)
1384    }
1385
1386    #[doc = "Receive Data Count"]
1387    #[inline(always)]
1388    pub fn rdc(
1389        self,
1390    ) -> crate::common::RegisterField<8, 0x3f, 1, 0, u8, u8, Ssifsr_SPEC, crate::common::R> {
1391        crate::common::RegisterField::<8,0x3f,1,0,u8,u8,Ssifsr_SPEC,crate::common::R>::from_register(self,0)
1392    }
1393
1394    #[doc = "Transmit Data Empty Flag"]
1395    #[inline(always)]
1396    pub fn tde(
1397        self,
1398    ) -> crate::common::RegisterField<
1399        16,
1400        0x1,
1401        1,
1402        0,
1403        ssifsr::Tde,
1404        ssifsr::Tde,
1405        Ssifsr_SPEC,
1406        crate::common::RW,
1407    > {
1408        crate::common::RegisterField::<
1409            16,
1410            0x1,
1411            1,
1412            0,
1413            ssifsr::Tde,
1414            ssifsr::Tde,
1415            Ssifsr_SPEC,
1416            crate::common::RW,
1417        >::from_register(self, 0)
1418    }
1419
1420    #[doc = "Transmit Data Count"]
1421    #[inline(always)]
1422    pub fn tdc(
1423        self,
1424    ) -> crate::common::RegisterField<24, 0x3f, 1, 0, u8, u8, Ssifsr_SPEC, crate::common::R> {
1425        crate::common::RegisterField::<24,0x3f,1,0,u8,u8,Ssifsr_SPEC,crate::common::R>::from_register(self,0)
1426    }
1427}
1428impl ::core::default::Default for Ssifsr {
1429    #[inline(always)]
1430    fn default() -> Ssifsr {
1431        <crate::RegValueT<Ssifsr_SPEC> as RegisterValue<_>>::new(65536)
1432    }
1433}
1434pub mod ssifsr {
1435
1436    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1437    pub struct Rdf_SPEC;
1438    pub type Rdf = crate::EnumBitfieldStruct<u8, Rdf_SPEC>;
1439    impl Rdf {
1440        #[doc = "The size of received data in SSIFRDR is not more than the value of SSISCR.RDFS."]
1441        pub const _0: Self = Self::new(0);
1442
1443        #[doc = "The size of received data in SSIFRDR is not less than the value of SSISCR.RDFS plus one."]
1444        pub const _1: Self = Self::new(1);
1445    }
1446    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1447    pub struct Tde_SPEC;
1448    pub type Tde = crate::EnumBitfieldStruct<u8, Tde_SPEC>;
1449    impl Tde {
1450        #[doc = "The free space of SSIFTDR is not more than the value of SSISCR.TDES."]
1451        pub const _0: Self = Self::new(0);
1452
1453        #[doc = "The free space of SSIFTDR is not less than the value of SSISCR.TDES plus one."]
1454        pub const _1: Self = Self::new(1);
1455    }
1456}
1457#[doc(hidden)]
1458#[derive(Copy, Clone, Eq, PartialEq)]
1459pub struct Ssiftdr_SPEC;
1460impl crate::sealed::RegSpec for Ssiftdr_SPEC {
1461    type DataType = u32;
1462}
1463
1464#[doc = "Transmit FIFO Data Register"]
1465pub type Ssiftdr = crate::RegValueT<Ssiftdr_SPEC>;
1466
1467impl Ssiftdr {
1468    #[doc = "Transmit FIFO Data"]
1469    #[inline(always)]
1470    pub fn ssiftdr(
1471        self,
1472    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Ssiftdr_SPEC, crate::common::W>
1473    {
1474        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Ssiftdr_SPEC,crate::common::W>::from_register(self,0)
1475    }
1476}
1477impl ::core::default::Default for Ssiftdr {
1478    #[inline(always)]
1479    fn default() -> Ssiftdr {
1480        <crate::RegValueT<Ssiftdr_SPEC> as RegisterValue<_>>::new(0)
1481    }
1482}
1483
1484#[doc(hidden)]
1485#[derive(Copy, Clone, Eq, PartialEq)]
1486pub struct Ssifrdr_SPEC;
1487impl crate::sealed::RegSpec for Ssifrdr_SPEC {
1488    type DataType = u32;
1489}
1490
1491#[doc = "Receive FIFO Data Register"]
1492pub type Ssifrdr = crate::RegValueT<Ssifrdr_SPEC>;
1493
1494impl Ssifrdr {
1495    #[doc = "Receive FIFO Data"]
1496    #[inline(always)]
1497    pub fn ssifrdr(
1498        self,
1499    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Ssifrdr_SPEC, crate::common::R>
1500    {
1501        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Ssifrdr_SPEC,crate::common::R>::from_register(self,0)
1502    }
1503}
1504impl ::core::default::Default for Ssifrdr {
1505    #[inline(always)]
1506    fn default() -> Ssifrdr {
1507        <crate::RegValueT<Ssifrdr_SPEC> as RegisterValue<_>>::new(0)
1508    }
1509}
1510
1511#[doc(hidden)]
1512#[derive(Copy, Clone, Eq, PartialEq)]
1513pub struct Ssiofr_SPEC;
1514impl crate::sealed::RegSpec for Ssiofr_SPEC {
1515    type DataType = u32;
1516}
1517
1518#[doc = "Audio Format Register"]
1519pub type Ssiofr = crate::RegValueT<Ssiofr_SPEC>;
1520
1521impl Ssiofr {
1522    #[doc = "Audio Format Select"]
1523    #[inline(always)]
1524    pub fn omod(
1525        self,
1526    ) -> crate::common::RegisterField<
1527        0,
1528        0x3,
1529        1,
1530        0,
1531        ssiofr::Omod,
1532        ssiofr::Omod,
1533        Ssiofr_SPEC,
1534        crate::common::RW,
1535    > {
1536        crate::common::RegisterField::<
1537            0,
1538            0x3,
1539            1,
1540            0,
1541            ssiofr::Omod,
1542            ssiofr::Omod,
1543            Ssiofr_SPEC,
1544            crate::common::RW,
1545        >::from_register(self, 0)
1546    }
1547
1548    #[doc = "Whether to Enable LRCK/FS Continuation"]
1549    #[inline(always)]
1550    pub fn lrcont(
1551        self,
1552    ) -> crate::common::RegisterField<
1553        8,
1554        0x1,
1555        1,
1556        0,
1557        ssiofr::Lrcont,
1558        ssiofr::Lrcont,
1559        Ssiofr_SPEC,
1560        crate::common::RW,
1561    > {
1562        crate::common::RegisterField::<
1563            8,
1564            0x1,
1565            1,
1566            0,
1567            ssiofr::Lrcont,
1568            ssiofr::Lrcont,
1569            Ssiofr_SPEC,
1570            crate::common::RW,
1571        >::from_register(self, 0)
1572    }
1573
1574    #[doc = "Whether to Enable Stopping BCK Output When SSIE is in Idle Status"]
1575    #[inline(always)]
1576    pub fn bckastp(
1577        self,
1578    ) -> crate::common::RegisterField<
1579        9,
1580        0x1,
1581        1,
1582        0,
1583        ssiofr::Bckastp,
1584        ssiofr::Bckastp,
1585        Ssiofr_SPEC,
1586        crate::common::RW,
1587    > {
1588        crate::common::RegisterField::<
1589            9,
1590            0x1,
1591            1,
1592            0,
1593            ssiofr::Bckastp,
1594            ssiofr::Bckastp,
1595            Ssiofr_SPEC,
1596            crate::common::RW,
1597        >::from_register(self, 0)
1598    }
1599}
1600impl ::core::default::Default for Ssiofr {
1601    #[inline(always)]
1602    fn default() -> Ssiofr {
1603        <crate::RegValueT<Ssiofr_SPEC> as RegisterValue<_>>::new(0)
1604    }
1605}
1606pub mod ssiofr {
1607
1608    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1609    pub struct Omod_SPEC;
1610    pub type Omod = crate::EnumBitfieldStruct<u8, Omod_SPEC>;
1611    impl Omod {
1612        #[doc = "I2S format"]
1613        pub const _00: Self = Self::new(0);
1614
1615        #[doc = "TDM format"]
1616        pub const _01: Self = Self::new(1);
1617
1618        #[doc = "Monaural format"]
1619        pub const _10: Self = Self::new(2);
1620
1621        #[doc = "Setting prohibited"]
1622        pub const _11: Self = Self::new(3);
1623    }
1624    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1625    pub struct Lrcont_SPEC;
1626    pub type Lrcont = crate::EnumBitfieldStruct<u8, Lrcont_SPEC>;
1627    impl Lrcont {
1628        #[doc = "Disables LRCK/FS continuation"]
1629        pub const _0: Self = Self::new(0);
1630
1631        #[doc = "Enables LRCK/FS continuation"]
1632        pub const _1: Self = Self::new(1);
1633    }
1634    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1635    pub struct Bckastp_SPEC;
1636    pub type Bckastp = crate::EnumBitfieldStruct<u8, Bckastp_SPEC>;
1637    impl Bckastp {
1638        #[doc = "Always outputs BCK to the SSIBCK0 pin"]
1639        pub const _0: Self = Self::new(0);
1640
1641        #[doc = "Automatically controls output of BCK to the SSIBCK0 pin"]
1642        pub const _1: Self = Self::new(1);
1643    }
1644}
1645#[doc(hidden)]
1646#[derive(Copy, Clone, Eq, PartialEq)]
1647pub struct Ssiscr_SPEC;
1648impl crate::sealed::RegSpec for Ssiscr_SPEC {
1649    type DataType = u32;
1650}
1651
1652#[doc = "Status Control Register"]
1653pub type Ssiscr = crate::RegValueT<Ssiscr_SPEC>;
1654
1655impl Ssiscr {
1656    #[doc = "RDF Setting Condition Select"]
1657    #[inline(always)]
1658    pub fn rdfs(
1659        self,
1660    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, Ssiscr_SPEC, crate::common::RW> {
1661        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,Ssiscr_SPEC,crate::common::RW>::from_register(self,0)
1662    }
1663
1664    #[doc = "TDE Setting Condition Select"]
1665    #[inline(always)]
1666    pub fn tdes(
1667        self,
1668    ) -> crate::common::RegisterField<8, 0x1f, 1, 0, u8, u8, Ssiscr_SPEC, crate::common::RW> {
1669        crate::common::RegisterField::<8,0x1f,1,0,u8,u8,Ssiscr_SPEC,crate::common::RW>::from_register(self,0)
1670    }
1671}
1672impl ::core::default::Default for Ssiscr {
1673    #[inline(always)]
1674    fn default() -> Ssiscr {
1675        <crate::RegValueT<Ssiscr_SPEC> as RegisterValue<_>>::new(0)
1676    }
1677}
ra6e1_pac/ssie0.rs

ra6e1_pac/
ssie0.rs
