1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"12-bit D/A converter"]
28unsafe impl ::core::marker::Send for super::Dac12 {}
29unsafe impl ::core::marker::Sync for super::Dac12 {}
30impl super::Dac12 {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "D/A Data Register n"]
38 #[inline(always)]
39 pub const fn dadrn(&self) -> &'static crate::common::Reg<self::DadRn_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::DadRn_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "D/A Control Register"]
48 #[inline(always)]
49 pub const fn dacr(&self) -> &'static crate::common::Reg<self::Dacr_SPEC, crate::common::RW> {
50 unsafe {
51 crate::common::Reg::<self::Dacr_SPEC, crate::common::RW>::from_ptr(
52 self._svd2pac_as_ptr().add(4usize),
53 )
54 }
55 }
56
57 #[doc = "DADR Format Select Register"]
58 #[inline(always)]
59 pub const fn dadpr(&self) -> &'static crate::common::Reg<self::Dadpr_SPEC, crate::common::RW> {
60 unsafe {
61 crate::common::Reg::<self::Dadpr_SPEC, crate::common::RW>::from_ptr(
62 self._svd2pac_as_ptr().add(5usize),
63 )
64 }
65 }
66
67 #[doc = "D/A A/D Synchronous Start Control Register"]
68 #[inline(always)]
69 pub const fn daadscr(
70 &self,
71 ) -> &'static crate::common::Reg<self::Daadscr_SPEC, crate::common::RW> {
72 unsafe {
73 crate::common::Reg::<self::Daadscr_SPEC, crate::common::RW>::from_ptr(
74 self._svd2pac_as_ptr().add(6usize),
75 )
76 }
77 }
78
79 #[doc = "D/A Output Amplifier Control Register"]
80 #[inline(always)]
81 pub const fn daampcr(
82 &self,
83 ) -> &'static crate::common::Reg<self::Daampcr_SPEC, crate::common::RW> {
84 unsafe {
85 crate::common::Reg::<self::Daampcr_SPEC, crate::common::RW>::from_ptr(
86 self._svd2pac_as_ptr().add(8usize),
87 )
88 }
89 }
90
91 #[doc = "D/A Amplifier Stabilization Wait Control Register"]
92 #[inline(always)]
93 pub const fn daaswcr(
94 &self,
95 ) -> &'static crate::common::Reg<self::Daaswcr_SPEC, crate::common::RW> {
96 unsafe {
97 crate::common::Reg::<self::Daaswcr_SPEC, crate::common::RW>::from_ptr(
98 self._svd2pac_as_ptr().add(28usize),
99 )
100 }
101 }
102
103 #[doc = "D/A A/D Synchronous Unit Select Register"]
104 #[inline(always)]
105 pub const fn daadusr(
106 &self,
107 ) -> &'static crate::common::Reg<self::Daadusr_SPEC, crate::common::RW> {
108 unsafe {
109 crate::common::Reg::<self::Daadusr_SPEC, crate::common::RW>::from_ptr(
110 self._svd2pac_as_ptr().add(4288usize),
111 )
112 }
113 }
114}
115#[doc(hidden)]
116#[derive(Copy, Clone, Eq, PartialEq)]
117pub struct DadRn_SPEC;
118impl crate::sealed::RegSpec for DadRn_SPEC {
119 type DataType = u16;
120}
121
122#[doc = "D/A Data Register n"]
123pub type DadRn = crate::RegValueT<DadRn_SPEC>;
124
125impl NoBitfieldReg<DadRn_SPEC> for DadRn {}
126impl ::core::default::Default for DadRn {
127 #[inline(always)]
128 fn default() -> DadRn {
129 <crate::RegValueT<DadRn_SPEC> as RegisterValue<_>>::new(0)
130 }
131}
132
133#[doc(hidden)]
134#[derive(Copy, Clone, Eq, PartialEq)]
135pub struct Dacr_SPEC;
136impl crate::sealed::RegSpec for Dacr_SPEC {
137 type DataType = u8;
138}
139
140#[doc = "D/A Control Register"]
141pub type Dacr = crate::RegValueT<Dacr_SPEC>;
142
143impl Dacr {
144 #[doc = "D/A Enable"]
145 #[inline(always)]
146 pub fn dae(
147 self,
148 ) -> crate::common::RegisterField<
149 5,
150 0x1,
151 1,
152 0,
153 dacr::Dae,
154 dacr::Dae,
155 Dacr_SPEC,
156 crate::common::RW,
157 > {
158 crate::common::RegisterField::<
159 5,
160 0x1,
161 1,
162 0,
163 dacr::Dae,
164 dacr::Dae,
165 Dacr_SPEC,
166 crate::common::RW,
167 >::from_register(self, 0)
168 }
169
170 #[doc = "D/A Output Enable 0"]
171 #[inline(always)]
172 pub fn daoe0(
173 self,
174 ) -> crate::common::RegisterField<
175 6,
176 0x1,
177 1,
178 0,
179 dacr::Daoe0,
180 dacr::Daoe0,
181 Dacr_SPEC,
182 crate::common::RW,
183 > {
184 crate::common::RegisterField::<
185 6,
186 0x1,
187 1,
188 0,
189 dacr::Daoe0,
190 dacr::Daoe0,
191 Dacr_SPEC,
192 crate::common::RW,
193 >::from_register(self, 0)
194 }
195}
196impl ::core::default::Default for Dacr {
197 #[inline(always)]
198 fn default() -> Dacr {
199 <crate::RegValueT<Dacr_SPEC> as RegisterValue<_>>::new(31)
200 }
201}
202pub mod dacr {
203
204 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
205 pub struct Dae_SPEC;
206 pub type Dae = crate::EnumBitfieldStruct<u8, Dae_SPEC>;
207 impl Dae {
208 #[doc = "Control D/A conversion of channels 0 and 1 individually"]
209 pub const _0: Self = Self::new(0);
210
211 #[doc = "Control D/A conversion of channels 0 and 1 collectively"]
212 pub const _1: Self = Self::new(1);
213 }
214 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
215 pub struct Daoe0_SPEC;
216 pub type Daoe0 = crate::EnumBitfieldStruct<u8, Daoe0_SPEC>;
217 impl Daoe0 {
218 #[doc = "Disable D/A conversion and analog output of channel 0 (DA0)"]
219 pub const _0: Self = Self::new(0);
220
221 #[doc = "Enable D/A conversion and analog output of channel 0 (DA0)"]
222 pub const _1: Self = Self::new(1);
223 }
224}
225#[doc(hidden)]
226#[derive(Copy, Clone, Eq, PartialEq)]
227pub struct Dadpr_SPEC;
228impl crate::sealed::RegSpec for Dadpr_SPEC {
229 type DataType = u8;
230}
231
232#[doc = "DADR Format Select Register"]
233pub type Dadpr = crate::RegValueT<Dadpr_SPEC>;
234
235impl Dadpr {
236 #[doc = "DADR Format Select"]
237 #[inline(always)]
238 pub fn dpsel(
239 self,
240 ) -> crate::common::RegisterField<
241 7,
242 0x1,
243 1,
244 0,
245 dadpr::Dpsel,
246 dadpr::Dpsel,
247 Dadpr_SPEC,
248 crate::common::RW,
249 > {
250 crate::common::RegisterField::<
251 7,
252 0x1,
253 1,
254 0,
255 dadpr::Dpsel,
256 dadpr::Dpsel,
257 Dadpr_SPEC,
258 crate::common::RW,
259 >::from_register(self, 0)
260 }
261}
262impl ::core::default::Default for Dadpr {
263 #[inline(always)]
264 fn default() -> Dadpr {
265 <crate::RegValueT<Dadpr_SPEC> as RegisterValue<_>>::new(0)
266 }
267}
268pub mod dadpr {
269
270 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
271 pub struct Dpsel_SPEC;
272 pub type Dpsel = crate::EnumBitfieldStruct<u8, Dpsel_SPEC>;
273 impl Dpsel {
274 #[doc = "Right-justified format"]
275 pub const _0: Self = Self::new(0);
276
277 #[doc = "Left-justified format"]
278 pub const _1: Self = Self::new(1);
279 }
280}
281#[doc(hidden)]
282#[derive(Copy, Clone, Eq, PartialEq)]
283pub struct Daadscr_SPEC;
284impl crate::sealed::RegSpec for Daadscr_SPEC {
285 type DataType = u8;
286}
287
288#[doc = "D/A A/D Synchronous Start Control Register"]
289pub type Daadscr = crate::RegValueT<Daadscr_SPEC>;
290
291impl Daadscr {
292 #[doc = "D/A A/D Synchronous Conversion"]
293 #[inline(always)]
294 pub fn daadst(
295 self,
296 ) -> crate::common::RegisterField<
297 7,
298 0x1,
299 1,
300 0,
301 daadscr::Daadst,
302 daadscr::Daadst,
303 Daadscr_SPEC,
304 crate::common::RW,
305 > {
306 crate::common::RegisterField::<
307 7,
308 0x1,
309 1,
310 0,
311 daadscr::Daadst,
312 daadscr::Daadst,
313 Daadscr_SPEC,
314 crate::common::RW,
315 >::from_register(self, 0)
316 }
317}
318impl ::core::default::Default for Daadscr {
319 #[inline(always)]
320 fn default() -> Daadscr {
321 <crate::RegValueT<Daadscr_SPEC> as RegisterValue<_>>::new(0)
322 }
323}
324pub mod daadscr {
325
326 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
327 pub struct Daadst_SPEC;
328 pub type Daadst = crate::EnumBitfieldStruct<u8, Daadst_SPEC>;
329 impl Daadst {
330 #[doc = "Do not synchronize DAC12 with ADC12 operation (disable interference reduction between D/A and A/D conversion)."]
331 pub const _0: Self = Self::new(0);
332
333 #[doc = "Synchronize DAC12 with ADC12 operation (enable interference reduction between D/A and A/D conversion)."]
334 pub const _1: Self = Self::new(1);
335 }
336}
337#[doc(hidden)]
338#[derive(Copy, Clone, Eq, PartialEq)]
339pub struct Daampcr_SPEC;
340impl crate::sealed::RegSpec for Daampcr_SPEC {
341 type DataType = u8;
342}
343
344#[doc = "D/A Output Amplifier Control Register"]
345pub type Daampcr = crate::RegValueT<Daampcr_SPEC>;
346
347impl Daampcr {
348 #[doc = "Amplifier Control 0"]
349 #[inline(always)]
350 pub fn daamp0(
351 self,
352 ) -> crate::common::RegisterField<
353 6,
354 0x1,
355 1,
356 0,
357 daampcr::Daamp0,
358 daampcr::Daamp0,
359 Daampcr_SPEC,
360 crate::common::RW,
361 > {
362 crate::common::RegisterField::<
363 6,
364 0x1,
365 1,
366 0,
367 daampcr::Daamp0,
368 daampcr::Daamp0,
369 Daampcr_SPEC,
370 crate::common::RW,
371 >::from_register(self, 0)
372 }
373}
374impl ::core::default::Default for Daampcr {
375 #[inline(always)]
376 fn default() -> Daampcr {
377 <crate::RegValueT<Daampcr_SPEC> as RegisterValue<_>>::new(0)
378 }
379}
380pub mod daampcr {
381
382 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
383 pub struct Daamp0_SPEC;
384 pub type Daamp0 = crate::EnumBitfieldStruct<u8, Daamp0_SPEC>;
385 impl Daamp0 {
386 #[doc = "Do not use channel 0 output amplifier"]
387 pub const _0: Self = Self::new(0);
388
389 #[doc = "Use channel 0 output amplifier"]
390 pub const _1: Self = Self::new(1);
391 }
392}
393#[doc(hidden)]
394#[derive(Copy, Clone, Eq, PartialEq)]
395pub struct Daaswcr_SPEC;
396impl crate::sealed::RegSpec for Daaswcr_SPEC {
397 type DataType = u8;
398}
399
400#[doc = "D/A Amplifier Stabilization Wait Control Register"]
401pub type Daaswcr = crate::RegValueT<Daaswcr_SPEC>;
402
403impl Daaswcr {
404 #[doc = "D/A Amplifier Stabilization Wait 0"]
405 #[inline(always)]
406 pub fn daasw0(
407 self,
408 ) -> crate::common::RegisterField<
409 6,
410 0x1,
411 1,
412 0,
413 daaswcr::Daasw0,
414 daaswcr::Daasw0,
415 Daaswcr_SPEC,
416 crate::common::RW,
417 > {
418 crate::common::RegisterField::<
419 6,
420 0x1,
421 1,
422 0,
423 daaswcr::Daasw0,
424 daaswcr::Daasw0,
425 Daaswcr_SPEC,
426 crate::common::RW,
427 >::from_register(self, 0)
428 }
429}
430impl ::core::default::Default for Daaswcr {
431 #[inline(always)]
432 fn default() -> Daaswcr {
433 <crate::RegValueT<Daaswcr_SPEC> as RegisterValue<_>>::new(0)
434 }
435}
436pub mod daaswcr {
437
438 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
439 pub struct Daasw0_SPEC;
440 pub type Daasw0 = crate::EnumBitfieldStruct<u8, Daasw0_SPEC>;
441 impl Daasw0 {
442 #[doc = "Amplifier stabilization wait off (output) for channel 0"]
443 pub const _0: Self = Self::new(0);
444
445 #[doc = "Amplifier stabilization wait on (high-Z) for channel 0"]
446 pub const _1: Self = Self::new(1);
447 }
448}
449#[doc(hidden)]
450#[derive(Copy, Clone, Eq, PartialEq)]
451pub struct Daadusr_SPEC;
452impl crate::sealed::RegSpec for Daadusr_SPEC {
453 type DataType = u8;
454}
455
456#[doc = "D/A A/D Synchronous Unit Select Register"]
457pub type Daadusr = crate::RegValueT<Daadusr_SPEC>;
458
459impl Daadusr {
460 #[doc = "A/D Unit 0 Select"]
461 #[inline(always)]
462 pub fn amadsel0(
463 self,
464 ) -> crate::common::RegisterField<
465 0,
466 0x1,
467 1,
468 0,
469 daadusr::Amadsel0,
470 daadusr::Amadsel0,
471 Daadusr_SPEC,
472 crate::common::RW,
473 > {
474 crate::common::RegisterField::<
475 0,
476 0x1,
477 1,
478 0,
479 daadusr::Amadsel0,
480 daadusr::Amadsel0,
481 Daadusr_SPEC,
482 crate::common::RW,
483 >::from_register(self, 0)
484 }
485}
486impl ::core::default::Default for Daadusr {
487 #[inline(always)]
488 fn default() -> Daadusr {
489 <crate::RegValueT<Daadusr_SPEC> as RegisterValue<_>>::new(0)
490 }
491}
492pub mod daadusr {
493
494 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
495 pub struct Amadsel0_SPEC;
496 pub type Amadsel0 = crate::EnumBitfieldStruct<u8, Amadsel0_SPEC>;
497 impl Amadsel0 {
498 #[doc = "Do not select unit 0"]
499 pub const _0: Self = Self::new(0);
500
501 #[doc = "Select unit 0"]
502 pub const _1: Self = Self::new(1);
503 }
504}