Trait r3_port_riscv::PlicOptions

pub trait PlicOptions {
    const PLIC_BASE: usize;
    const MAX_PRIORITY: InterruptPriority;
    const MAX_NUM: InterruptNum;
    const CONTEXT: usize;
    const USE_NESTING: bool;
}

The options for use_plic!.

Associated Constants

const PLIC_BASE: usize

The base address of PLIC’s memory-mapped registers.

const MAX_PRIORITY: InterruptPriority

The maximum (highest) interrupt priority supported by the PLIC implementation.

const MAX_NUM: InterruptNum

The last interrupt source supported by the PLIC implementation. Must be in range 0..=1023.

const CONTEXT: usize

The PLIC context for the hart on which the kernel runs.

const USE_NESTING: bool

Enables the trick for nested interrupt processing.

PLIC is not designed to allow nested interrupt processing. When this flag is enabled, the driver will signal completion earlier to start accepting higher-priority interrupts.

The following advices should be taken into consideration when enabling this option:

• This should be disabled when there is at least one interrupt source configured to target multiple contexts.

• Some PLIC gateway implementations don’t clear the pending flag when an incoming interrupt request signal is deasserted. The pending flag gets set again as soon as completion is signaled, meaning the interrupt will be claimed twice every time it’s taken. The PLIC in FE310 has this issue.

Defaults to false when unspecified.

Implementors