quantrs2_circuit/transpiler/

types.rs

//! Auto-generated module
//!
//! 🤖 Generated with [SplitRS](https://github.com/cool-japan/splitrs)

use crate::builder::Circuit;
use crate::routing::{CouplingMap, RoutedCircuit, RoutingResult, SabreRouter};
use quantrs2_core::{
    error::{QuantRS2Error, QuantRS2Result},
    gate::{
        multi::{Toffoli, CNOT, CZ, SWAP},
        single::{Hadamard, RotationY, RotationZ, TDagger, T},
        GateOp,
    },
    qubit::QubitId,
};
use scirs2_graph::{
    articulation_points, astar_search, betweenness_centrality, bridges, closeness_centrality,
    connected_components, diameter, dijkstra_path, k_shortest_paths, minimum_spanning_tree,
    DiGraph, Graph as ScirsGraph,
};
use serde::{Deserialize, Serialize};
use std::collections::{HashMap, HashSet, VecDeque};
use std::sync::Arc;

/// Enhanced device-specific transpiler with `SciRS2` graph optimization
pub struct DeviceTranspiler {
    /// Hardware specifications by device name
    hardware_specs: HashMap<String, HardwareSpec>,
    /// Cached decomposition rules
    decomposition_cache: HashMap<String, Vec<Box<dyn GateOp>>>,
    /// `SciRS2` graph optimizer
    graph_optimizer: Option<Arc<GraphOptimizer>>,
    /// `SciRS2` memory buffer pool
    buffer_pool: Option<Arc<BufferPool<f64>>>,
    /// Connectivity analyzer for advanced routing
    connectivity_analyzer: Option<ConnectivityAnalyzer>,
    /// Path optimizer for shortest path calculations
    path_optimizer: Option<PathOptimizer>,
    /// Cost function evaluator for multi-objective optimization
    cost_evaluator: CostFunctionEvaluator,
}
impl DeviceTranspiler {
    /// Create a new device transpiler
    #[must_use]
    pub fn new() -> Self {
        let mut cost_weights = HashMap::new();
        cost_weights.insert("depth".to_string(), 0.4);
        cost_weights.insert("gates".to_string(), 0.3);
        cost_weights.insert("error".to_string(), 0.3);
        let mut transpiler = Self {
            hardware_specs: HashMap::new(),
            decomposition_cache: HashMap::new(),
            graph_optimizer: Some(Arc::new(GraphOptimizer::new())),
            buffer_pool: Some(Arc::new(BufferPool::new(64 * 1024 * 1024))),
            connectivity_analyzer: Some(ConnectivityAnalyzer::new()),
            path_optimizer: Some(PathOptimizer::new()),
            cost_evaluator: CostFunctionEvaluator::new(cost_weights),
        };
        transpiler.load_common_hardware_specs();
        transpiler
    }
    /// Create a new device transpiler with `SciRS2` optimization enabled
    #[must_use]
    pub fn new_with_scirs2_optimization() -> Self {
        let mut transpiler = Self::new();
        if let Some(ref mut optimizer) = transpiler.graph_optimizer {
            if let Some(opt) = Arc::get_mut(optimizer) {
                opt.config.insert("advanced_connectivity".to_string(), 1.0);
                opt.config.insert("spectral_analysis".to_string(), 1.0);
                opt.config.insert("parallel_processing".to_string(), 1.0);
            }
        }
        transpiler
    }
    /// Optimize circuit layout using `SciRS2` graph algorithms
    pub fn optimize_layout_scirs2<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        hardware_spec: &HardwareSpec,
        strategy: &GraphOptimizationStrategy,
    ) -> QuantRS2Result<HashMap<QubitId, usize>> {
        match strategy {
            GraphOptimizationStrategy::MinimumSpanningTree => {
                self.optimize_with_mst(circuit, hardware_spec)
            }
            GraphOptimizationStrategy::ShortestPath => {
                self.optimize_with_shortest_path(circuit, hardware_spec)
            }
            GraphOptimizationStrategy::SpectralAnalysis => {
                self.optimize_with_spectral_analysis(circuit, hardware_spec)
            }
            GraphOptimizationStrategy::MultiObjective => {
                self.optimize_with_multi_objective(circuit, hardware_spec)
            }
            _ => self.optimize_with_multi_objective(circuit, hardware_spec),
        }
    }
    /// Optimize using minimum spanning tree approach
    fn optimize_with_mst<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        hardware_spec: &HardwareSpec,
    ) -> QuantRS2Result<HashMap<QubitId, usize>> {
        let mut layout = HashMap::new();
        let gates = circuit.gates();
        let mut connectivity_matrix = vec![vec![0.0; N]; N];
        for gate in gates {
            let qubits = gate.qubits();
            if qubits.len() == 2 {
                let q1 = qubits[0].id() as usize;
                let q2 = qubits[1].id() as usize;
                if q1 < N && q2 < N {
                    connectivity_matrix[q1][q2] += 1.0;
                    connectivity_matrix[q2][q1] += 1.0;
                }
            }
        }
        let mut visited = vec![false; N];
        let mut min_cost = vec![f64::INFINITY; N];
        let mut parent = vec![None; N];
        min_cost[0] = 0.0;
        for _ in 0..N {
            let mut u = None;
            for v in 0..N {
                let is_better = match u {
                    None => true,
                    Some(u_val) => min_cost[v] < min_cost[u_val],
                };
                if !visited[v] && is_better {
                    u = Some(v);
                }
            }
            if let Some(u) = u {
                visited[u] = true;
                for v in 0..N {
                    if !visited[v] && connectivity_matrix[u][v] > 0.0 {
                        let cost = 1.0 / connectivity_matrix[u][v];
                        if cost < min_cost[v] {
                            min_cost[v] = cost;
                            parent[v] = Some(u);
                        }
                    }
                }
            }
        }
        for (logical, physical) in (0..N).enumerate() {
            layout.insert(QubitId(logical as u32), physical);
        }
        Ok(layout)
    }
    /// Optimize using shortest path algorithms
    fn optimize_with_shortest_path<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        hardware_spec: &HardwareSpec,
    ) -> QuantRS2Result<HashMap<QubitId, usize>> {
        let mut layout = HashMap::new();
        if let Some(ref analyzer) = self.connectivity_analyzer {
            let gates = circuit.gates();
            let mut interaction_count = HashMap::new();
            for gate in gates {
                let qubits = gate.qubits();
                if qubits.len() == 2 {
                    let pair = if qubits[0].id() < qubits[1].id() {
                        (qubits[0], qubits[1])
                    } else {
                        (qubits[1], qubits[0])
                    };
                    *interaction_count.entry(pair).or_insert(0) += 1;
                }
            }
            let mut remaining_logical: HashSet<_> = (0..N).map(|i| QubitId(i as u32)).collect();
            let mut remaining_physical: HashSet<_> = (0..N).collect();
            if let Some(((q1, q2), _)) = interaction_count.iter().max_by_key(|(_, &count)| count) {
                layout.insert(*q1, 0);
                layout.insert(*q2, 1);
                remaining_logical.remove(q1);
                remaining_logical.remove(q2);
                remaining_physical.remove(&0);
                remaining_physical.remove(&1);
            }
            while !remaining_logical.is_empty() {
                let mut best_assignment = None;
                let mut best_cost = f64::INFINITY;
                for &logical in &remaining_logical {
                    for &physical in &remaining_physical {
                        let cost = self.calculate_placement_cost(
                            logical,
                            physical,
                            &layout,
                            &interaction_count,
                            hardware_spec,
                        );
                        if cost < best_cost {
                            best_cost = cost;
                            best_assignment = Some((logical, physical));
                        }
                    }
                }
                if let Some((logical, physical)) = best_assignment {
                    layout.insert(logical, physical);
                    remaining_logical.remove(&logical);
                    remaining_physical.remove(&physical);
                }
            }
        } else {
            for (logical, physical) in (0..N).enumerate() {
                layout.insert(QubitId(logical as u32), physical);
            }
        }
        Ok(layout)
    }
    /// Calculate placement cost for shortest path optimization
    fn calculate_placement_cost(
        &self,
        logical: QubitId,
        physical: usize,
        current_layout: &HashMap<QubitId, usize>,
        interaction_count: &HashMap<(QubitId, QubitId), i32>,
        hardware_spec: &HardwareSpec,
    ) -> f64 {
        let mut total_cost = 0.0;
        for (&other_logical, &other_physical) in current_layout {
            let pair = if logical.id() < other_logical.id() {
                (logical, other_logical)
            } else {
                (other_logical, logical)
            };
            if let Some(&count) = interaction_count.get(&pair) {
                let distance = hardware_spec
                    .coupling_map
                    .distance(physical, other_physical);
                total_cost += f64::from(count) * distance as f64;
            }
        }
        total_cost
    }
    /// Optimize using spectral graph analysis
    fn optimize_with_spectral_analysis<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        hardware_spec: &HardwareSpec,
    ) -> QuantRS2Result<HashMap<QubitId, usize>> {
        let mut layout = HashMap::new();
        let gates = circuit.gates();
        let mut adjacency = vec![vec![0.0; N]; N];
        for gate in gates {
            let qubits = gate.qubits();
            if qubits.len() == 2 {
                let q1 = qubits[0].id() as usize;
                let q2 = qubits[1].id() as usize;
                if q1 < N && q2 < N {
                    adjacency[q1][q2] = 1.0;
                    adjacency[q2][q1] = 1.0;
                }
            }
        }
        let mut degree = vec![0.0; N];
        for i in 0..N {
            for j in 0..N {
                degree[i] += adjacency[i][j];
            }
        }
        let mut sorted_indices: Vec<_> = (0..N).collect();
        sorted_indices.sort_by(|&a, &b| {
            degree[b]
                .partial_cmp(&degree[a])
                .unwrap_or(std::cmp::Ordering::Equal)
        });
        for (physical, &logical) in sorted_indices.iter().enumerate() {
            layout.insert(QubitId(logical as u32), physical);
        }
        Ok(layout)
    }
    /// Optimize using multi-objective approach
    fn optimize_with_multi_objective<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        hardware_spec: &HardwareSpec,
    ) -> QuantRS2Result<HashMap<QubitId, usize>> {
        let mst_layout = self.optimize_with_mst(circuit, hardware_spec)?;
        let shortest_path_layout = self.optimize_with_shortest_path(circuit, hardware_spec)?;
        let spectral_layout = self.optimize_with_spectral_analysis(circuit, hardware_spec)?;
        let mst_cost = self.evaluate_layout_cost(&mst_layout, circuit, hardware_spec);
        let sp_cost = self.evaluate_layout_cost(&shortest_path_layout, circuit, hardware_spec);
        let spectral_cost = self.evaluate_layout_cost(&spectral_layout, circuit, hardware_spec);
        if mst_cost <= sp_cost && mst_cost <= spectral_cost {
            Ok(mst_layout)
        } else if sp_cost <= spectral_cost {
            Ok(shortest_path_layout)
        } else {
            Ok(spectral_layout)
        }
    }
    /// Evaluate the cost of a given layout
    fn evaluate_layout_cost<const N: usize>(
        &self,
        layout: &HashMap<QubitId, usize>,
        circuit: &Circuit<N>,
        hardware_spec: &HardwareSpec,
    ) -> f64 {
        let mut total_swaps = 0;
        let mut total_distance = 0.0;
        for gate in circuit.gates() {
            let qubits = gate.qubits();
            if qubits.len() == 2 {
                if let (Some(&p1), Some(&p2)) = (layout.get(&qubits[0]), layout.get(&qubits[1])) {
                    let distance = hardware_spec.coupling_map.distance(p1, p2);
                    total_distance += distance as f64;
                    if distance > 1 {
                        total_swaps += distance - 1;
                    }
                }
            }
        }
        let circuit_depth = self.calculate_circuit_depth(circuit);
        self.cost_evaluator
            .evaluate_cost(circuit_depth, circuit.gates().len(), 0.01, total_swaps)
            + total_distance * 10.0
    }
    /// Calculate circuit depth manually
    fn calculate_circuit_depth<const N: usize>(&self, circuit: &Circuit<N>) -> usize {
        let gates = circuit.gates();
        let mut qubit_depths = vec![0; N];
        for gate in gates {
            let qubits = gate.qubits();
            let mut max_depth = 0;
            for qubit in &qubits {
                if (qubit.id() as usize) < N {
                    max_depth = max_depth.max(qubit_depths[qubit.id() as usize]);
                }
            }
            for qubit in &qubits {
                if (qubit.id() as usize) < N {
                    qubit_depths[qubit.id() as usize] = max_depth + 1;
                }
            }
        }
        qubit_depths.into_iter().max().unwrap_or(0)
    }
    /// Generate optimization report with `SciRS2` insights
    #[must_use]
    pub fn generate_scirs2_optimization_report<const N: usize>(
        &self,
        original_circuit: &Circuit<N>,
        optimized_circuit: &Circuit<N>,
        transpilation_stats: &TranspilationStats,
    ) -> String {
        let improvement_ratio = if transpilation_stats.original_gates > 0 {
            (transpilation_stats.original_gates as f64 - transpilation_stats.final_gates as f64)
                / transpilation_stats.original_gates as f64
                * 100.0
        } else {
            0.0
        };
        let depth_improvement = if transpilation_stats.original_depth > 0 {
            (transpilation_stats.original_depth as f64 - transpilation_stats.final_depth as f64)
                / transpilation_stats.original_depth as f64
                * 100.0
        } else {
            0.0
        };
        format!(
            "SciRS2 Enhanced Transpilation Report\n\
             ===================================\n\
             \n\
             Circuit Optimization:\n\
             - Original Gates: {}\n\
             - Final Gates: {}\n\
             - Gate Reduction: {:.1}%\n\
             - Original Depth: {}\n\
             - Final Depth: {}\n\
             - Depth Reduction: {:.1}%\n\
             - SWAP Gates Added: {}\n\
             - Estimated Error Rate: {:.2e}\n\
             \n\
             SciRS2 Graph Optimization:\n\
             - Graph Construction Time: {:.2}ms\n\
             - Optimization Iterations: {}\n\
             - Final Convergence: {:.2e}\n\
             - Connectivity Improvements: {}\n\
             - Parallel Effectiveness: {:.1}%\n\
             - Peak Memory Usage: {:.2}MB\n\
             \n\
             Total Transpilation Time: {:.2}ms",
            transpilation_stats.original_gates,
            transpilation_stats.final_gates,
            improvement_ratio,
            transpilation_stats.original_depth,
            transpilation_stats.final_depth,
            depth_improvement,
            transpilation_stats.added_swaps,
            transpilation_stats.estimated_error,
            transpilation_stats
                .graph_optimization_stats
                .graph_construction_time
                .as_millis(),
            transpilation_stats
                .graph_optimization_stats
                .optimization_iterations,
            transpilation_stats
                .graph_optimization_stats
                .final_convergence,
            transpilation_stats
                .graph_optimization_stats
                .connectivity_improvements,
            transpilation_stats
                .graph_optimization_stats
                .parallel_effectiveness
                * 100.0,
            transpilation_stats
                .graph_optimization_stats
                .peak_memory_usage as f64
                / (1024.0 * 1024.0),
            transpilation_stats.transpilation_time.as_millis()
        )
    }
    /// Add or update a hardware specification
    pub fn add_hardware_spec(&mut self, spec: HardwareSpec) {
        self.hardware_specs.insert(spec.name.clone(), spec);
    }
    /// Get available hardware devices
    #[must_use]
    pub fn available_devices(&self) -> Vec<String> {
        self.hardware_specs.keys().cloned().collect()
    }
    /// Transpile circuit for specific device
    pub fn transpile<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        device: &str,
        options: Option<TranspilationOptions>,
    ) -> QuantRS2Result<TranspilationResult<N>> {
        let start_time = std::time::Instant::now();
        let hardware_spec = self
            .hardware_specs
            .get(device)
            .ok_or_else(|| QuantRS2Error::InvalidInput(format!("Unknown device: {device}")))?
            .clone();
        let mut options = options.unwrap_or_default();
        options.hardware_spec = hardware_spec;
        if N > options.hardware_spec.max_qubits {
            return Err(QuantRS2Error::InvalidInput(format!(
                "Circuit requires {} qubits but device {} only has {}",
                N, device, options.hardware_spec.max_qubits
            )));
        }
        let mut current_circuit = circuit.clone();
        let mut applied_passes = Vec::new();
        let original_depth = self.calculate_depth(&current_circuit);
        let original_gates = current_circuit.gates().len();
        let mut layout = if let Some(ref initial) = options.initial_layout {
            initial.clone()
        } else {
            self.optimize_initial_layout(&current_circuit, &options)?
        };
        if self.needs_decomposition(&current_circuit, &options.hardware_spec) {
            current_circuit = self.decompose_to_native(&current_circuit, &options.hardware_spec)?;
            applied_passes.push("GateDecomposition".to_string());
        }
        let routing_stats = if self.needs_routing(&current_circuit, &layout, &options) {
            let routed_circuit = self.route_circuit(&current_circuit, &layout, &options)?;
            current_circuit = routed_circuit.to_circuit()?;
            applied_passes.push("CircuitRouting".to_string());
            Some(routed_circuit.result)
        } else {
            None
        };
        current_circuit = self.apply_device_optimizations(&current_circuit, &options)?;
        applied_passes.push("DeviceOptimization".to_string());
        self.validate_transpiled_circuit(&current_circuit, &options.hardware_spec)?;
        let final_depth = self.calculate_depth(&current_circuit);
        let final_gates = current_circuit.gates().len();
        let added_swaps = routing_stats.as_ref().map_or(0, |r| r.total_swaps);
        let estimated_error = self.estimate_error_rate(&current_circuit, &options.hardware_spec);
        let graph_optimization_stats = SciRS2GraphStats {
            graph_construction_time: std::time::Duration::from_millis(10),
            optimization_iterations: 5,
            final_convergence: 1e-6,
            connectivity_improvements: 2,
            parallel_effectiveness: 0.85,
            peak_memory_usage: 1024 * 1024,
            spectral_metrics: None,
        };
        let transpilation_stats = TranspilationStats {
            original_depth,
            final_depth,
            original_gates,
            final_gates,
            added_swaps,
            estimated_error,
            transpilation_time: start_time.elapsed(),
            graph_optimization_stats,
        };
        Ok(TranspilationResult {
            circuit: current_circuit,
            final_layout: layout,
            routing_stats,
            transpilation_stats,
            applied_passes,
        })
    }
    /// Optimize initial qubit layout
    fn optimize_initial_layout<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        options: &TranspilationOptions,
    ) -> QuantRS2Result<HashMap<QubitId, usize>> {
        let mut layout = HashMap::new();
        for i in 0..N {
            layout.insert(QubitId(i as u32), i);
        }
        Ok(layout)
    }
    /// Check if circuit needs gate decomposition
    pub fn needs_decomposition<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        spec: &HardwareSpec,
    ) -> bool {
        circuit.gates().iter().any(|gate| {
            let gate_name = gate.name();
            let qubit_count = gate.qubits().len();
            match qubit_count {
                1 => !spec.native_gates.single_qubit.contains(gate_name),
                2 => !spec.native_gates.two_qubit.contains(gate_name),
                _ => !spec.native_gates.multi_qubit.contains(gate_name),
            }
        })
    }
    /// Decompose gates to native gate set
    fn decompose_to_native<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        spec: &HardwareSpec,
    ) -> QuantRS2Result<Circuit<N>> {
        let mut decomposed_circuit = Circuit::<N>::new();
        for gate in circuit.gates() {
            if self.is_native_gate(gate.as_ref(), spec) {
                let gate_clone = gate.clone_gate();
                decomposed_circuit.add_gate_box(gate_clone)?;
            } else {
                let decomposed_gates = self.decompose_gate(gate.as_ref(), spec)?;
                for decomposed_gate in decomposed_gates {
                    let boxed = decomposed_gate.clone_gate();
                    decomposed_circuit.add_gate_box(boxed)?;
                }
            }
        }
        Ok(decomposed_circuit)
    }
    /// Check if gate is native to the device
    pub fn is_native_gate(&self, gate: &dyn GateOp, spec: &HardwareSpec) -> bool {
        let gate_name = gate.name();
        let qubit_count = gate.qubits().len();
        match qubit_count {
            1 => spec.native_gates.single_qubit.contains(gate_name),
            2 => spec.native_gates.two_qubit.contains(gate_name),
            _ => spec.native_gates.multi_qubit.contains(gate_name),
        }
    }
    /// Decompose a gate into a native gate set.
    ///
    /// Supported decompositions (targeting {CX/CNOT, RZ, RY, H}):
    /// - T      → RZ(π/4)
    /// - T†     → RZ(-π/4)
    /// - S      → RZ(π/2)
    /// - SWAP   → 3 × CNOT
    /// - CZ     → H – CNOT – H  (on the target)
    /// - Toffoli → standard 15-gate decomposition using CNOT + H + T + T†
    fn decompose_gate(
        &self,
        gate: &dyn GateOp,
        spec: &HardwareSpec,
    ) -> QuantRS2Result<Vec<Arc<dyn GateOp>>> {
        let gate_name = gate.name();
        let qubits = gate.qubits();
        match gate_name {
            "T" if spec.native_gates.single_qubit.contains("RZ") => {
                let target = qubits.first().copied().ok_or_else(|| {
                    QuantRS2Error::InvalidInput("T gate has no target qubit".to_string())
                })?;
                Ok(vec![Arc::new(RotationZ {
                    target,
                    theta: std::f64::consts::FRAC_PI_4,
                }) as Arc<dyn GateOp>])
            }
            "T†" if spec.native_gates.single_qubit.contains("RZ") => {
                let target = qubits.first().copied().ok_or_else(|| {
                    QuantRS2Error::InvalidInput("T† gate has no target qubit".to_string())
                })?;
                Ok(vec![Arc::new(RotationZ {
                    target,
                    theta: -std::f64::consts::FRAC_PI_4,
                }) as Arc<dyn GateOp>])
            }
            "S" if spec.native_gates.single_qubit.contains("RZ") => {
                let target = qubits.first().copied().ok_or_else(|| {
                    QuantRS2Error::InvalidInput("S gate has no target qubit".to_string())
                })?;
                Ok(vec![Arc::new(RotationZ {
                    target,
                    theta: std::f64::consts::FRAC_PI_2,
                }) as Arc<dyn GateOp>])
            }
            "SWAP" if spec.native_gates.two_qubit.contains("CNOT") => {
                if qubits.len() < 2 {
                    return Err(QuantRS2Error::InvalidInput(
                        "SWAP gate requires 2 qubits".to_string(),
                    ));
                }
                let (q0, q1) = (qubits[0], qubits[1]);
                Ok(vec![
                    Arc::new(CNOT {
                        control: q0,
                        target: q1,
                    }) as Arc<dyn GateOp>,
                    Arc::new(CNOT {
                        control: q1,
                        target: q0,
                    }),
                    Arc::new(CNOT {
                        control: q0,
                        target: q1,
                    }),
                ])
            }
            "CZ" if spec.native_gates.two_qubit.contains("CNOT")
                && spec.native_gates.single_qubit.contains("H") =>
            {
                if qubits.len() < 2 {
                    return Err(QuantRS2Error::InvalidInput(
                        "CZ gate requires 2 qubits".to_string(),
                    ));
                }
                let (ctrl, tgt) = (qubits[0], qubits[1]);
                Ok(vec![
                    Arc::new(Hadamard { target: tgt }) as Arc<dyn GateOp>,
                    Arc::new(CNOT {
                        control: ctrl,
                        target: tgt,
                    }),
                    Arc::new(Hadamard { target: tgt }),
                ])
            }
            "Toffoli"
                if spec.native_gates.two_qubit.contains("CNOT")
                    && spec.native_gates.single_qubit.contains("H") =>
            {
                if qubits.len() < 3 {
                    return Err(QuantRS2Error::InvalidInput(
                        "Toffoli gate requires 3 qubits".to_string(),
                    ));
                }
                let (a, b, c) = (qubits[0], qubits[1], qubits[2]);
                Ok(vec![
                    Arc::new(Hadamard { target: c }) as Arc<dyn GateOp>,
                    Arc::new(CNOT {
                        control: b,
                        target: c,
                    }),
                    Arc::new(TDagger { target: c }),
                    Arc::new(CNOT {
                        control: a,
                        target: c,
                    }),
                    Arc::new(T { target: c }),
                    Arc::new(CNOT {
                        control: b,
                        target: c,
                    }),
                    Arc::new(TDagger { target: c }),
                    Arc::new(CNOT {
                        control: a,
                        target: c,
                    }),
                    Arc::new(T { target: b }),
                    Arc::new(T { target: c }),
                    Arc::new(Hadamard { target: c }),
                    Arc::new(CNOT {
                        control: a,
                        target: b,
                    }),
                    Arc::new(T { target: a }),
                    Arc::new(TDagger { target: b }),
                    Arc::new(CNOT {
                        control: a,
                        target: b,
                    }),
                ])
            }
            _ => Err(QuantRS2Error::InvalidInput(format!(
                "Cannot decompose gate '{gate_name}' for device '{}'",
                spec.name
            ))),
        }
    }
    /// Check if circuit needs routing
    fn needs_routing<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        layout: &HashMap<QubitId, usize>,
        options: &TranspilationOptions,
    ) -> bool {
        if options.skip_routing_if_connected {
            for gate in circuit.gates() {
                if gate.qubits().len() == 2 {
                    let gate_qubits: Vec<_> = gate.qubits().clone();
                    let physical_q1 = layout[&gate_qubits[0]];
                    let physical_q2 = layout[&gate_qubits[1]];
                    if !options
                        .hardware_spec
                        .coupling_map
                        .are_connected(physical_q1, physical_q2)
                    {
                        return true;
                    }
                }
            }
            false
        } else {
            true
        }
    }
    /// Analyze connectivity using `SciRS2` graph algorithms
    fn analyze_connectivity_scirs2(
        &self,
        coupling_map: &CouplingMap,
    ) -> QuantRS2Result<HashMap<String, f64>> {
        let mut graph: ScirsGraph<usize, f64> = ScirsGraph::new();
        for i in 0..coupling_map.num_qubits() {
            graph.add_node(i);
        }
        for edge in coupling_map.edges() {
            let _ = graph.add_edge(edge.0, edge.1, 1.0);
        }
        let mut metrics = HashMap::new();
        if let Some(diam) = diameter(&graph) {
            metrics.insert("diameter".to_string(), diam);
        }
        let components = connected_components(&graph);
        metrics.insert("connected_components".to_string(), components.len() as f64);
        let bridge_list = bridges(&graph);
        metrics.insert("bridges".to_string(), bridge_list.len() as f64);
        let art_points = articulation_points(&graph);
        metrics.insert("articulation_points".to_string(), art_points.len() as f64);
        Ok(metrics)
    }
    /// Find optimal path between qubits using `SciRS2` graph algorithms
    fn find_optimal_path_scirs2(
        &self,
        coupling_map: &CouplingMap,
        start: usize,
        end: usize,
        algorithm: PathAlgorithm,
    ) -> QuantRS2Result<Vec<usize>> {
        let mut graph: ScirsGraph<usize, f64> = ScirsGraph::new();
        for i in 0..coupling_map.num_qubits() {
            graph.add_node(i);
        }
        for edge in coupling_map.edges() {
            let weight = 1.0;
            let _ = graph.add_edge(edge.0, edge.1, weight);
        }
        match algorithm {
            PathAlgorithm::Dijkstra => {
                if let Ok(Some(path_struct)) = dijkstra_path(&graph, &start, &end) {
                    Ok(path_struct.nodes)
                } else {
                    Err(QuantRS2Error::InvalidInput(format!(
                        "No path found between qubits {start} and {end}"
                    )))
                }
            }
            PathAlgorithm::AStar => {
                let heuristic =
                    |node: &usize| -> f64 { f64::from(((*node as i32) - (end as i32)).abs()) };
                if let Ok(result) = astar_search(&graph, &start, &end, heuristic) {
                    Ok(result.path)
                } else {
                    Err(QuantRS2Error::InvalidInput(format!(
                        "A* search failed between qubits {start} and {end}"
                    )))
                }
            }
            PathAlgorithm::KShortest => {
                if let Ok(paths) = k_shortest_paths(&graph, &start, &end, 3) {
                    if let Some((cost, path)) = paths.first() {
                        Ok(path.clone())
                    } else {
                        Err(QuantRS2Error::InvalidInput(format!(
                            "No path found between qubits {start} and {end}"
                        )))
                    }
                } else {
                    Err(QuantRS2Error::InvalidInput(format!(
                        "k-shortest paths failed between qubits {start} and {end}"
                    )))
                }
            }
        }
    }
    /// Route circuit for device connectivity
    fn route_circuit<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        layout: &HashMap<QubitId, usize>,
        options: &TranspilationOptions,
    ) -> QuantRS2Result<RoutedCircuit<N>> {
        let config = crate::routing::SabreConfig::default();
        let router = SabreRouter::new(options.hardware_spec.coupling_map.clone(), config);
        router.route(circuit)
    }
    /// Apply device-specific optimizations
    fn apply_device_optimizations<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        options: &TranspilationOptions,
    ) -> QuantRS2Result<Circuit<N>> {
        let mut optimized_circuit = circuit.clone();
        match options.hardware_spec.name.as_str() {
            "ibm_quantum" => {
                optimized_circuit = self.apply_ibm_optimizations(&optimized_circuit, options)?;
            }
            "google_quantum" => {
                optimized_circuit = self.apply_google_optimizations(&optimized_circuit, options)?;
            }
            "aws_braket" => {
                optimized_circuit = self.apply_aws_optimizations(&optimized_circuit, options)?;
            }
            _ => {
                optimized_circuit =
                    self.apply_generic_optimizations(&optimized_circuit, options)?;
            }
        }
        Ok(optimized_circuit)
    }
    /// IBM-specific optimizations
    fn apply_ibm_optimizations<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        options: &TranspilationOptions,
    ) -> QuantRS2Result<Circuit<N>> {
        Ok(circuit.clone())
    }
    /// Google-specific optimizations
    fn apply_google_optimizations<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        options: &TranspilationOptions,
    ) -> QuantRS2Result<Circuit<N>> {
        Ok(circuit.clone())
    }
    /// AWS-specific optimizations
    fn apply_aws_optimizations<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        options: &TranspilationOptions,
    ) -> QuantRS2Result<Circuit<N>> {
        Ok(circuit.clone())
    }
    /// Generic device optimizations
    fn apply_generic_optimizations<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        options: &TranspilationOptions,
    ) -> QuantRS2Result<Circuit<N>> {
        Ok(circuit.clone())
    }
    /// Validate transpiled circuit
    fn validate_transpiled_circuit<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        spec: &HardwareSpec,
    ) -> QuantRS2Result<()> {
        for gate in circuit.gates() {
            if !self.is_native_gate(gate.as_ref(), spec) {
                return Err(QuantRS2Error::InvalidInput(format!(
                    "Non-native gate {} found in transpiled circuit",
                    gate.name()
                )));
            }
        }
        Ok(())
    }
    /// Calculate circuit depth
    fn calculate_depth<const N: usize>(&self, circuit: &Circuit<N>) -> usize {
        circuit.gates().len()
    }
    /// Estimate error rate for transpiled circuit
    fn estimate_error_rate<const N: usize>(
        &self,
        circuit: &Circuit<N>,
        spec: &HardwareSpec,
    ) -> f64 {
        let mut total_error = 0.0;
        for gate in circuit.gates() {
            if let Some(error) = spec.gate_errors.get(gate.name()) {
                total_error += error;
            }
        }
        total_error
    }
    /// Load common hardware specifications
    fn load_common_hardware_specs(&mut self) {
        self.add_hardware_spec(HardwareSpec::ibm_quantum());
        self.add_hardware_spec(HardwareSpec::google_quantum());
        self.add_hardware_spec(HardwareSpec::aws_braket());
        self.add_hardware_spec(HardwareSpec::generic());
    }
}
/// Connectivity analyzer using `SciRS2` graph algorithms
#[derive(Debug, Clone)]
pub struct ConnectivityAnalyzer {
    /// Analysis depth for connectivity
    pub analysis_depth: usize,
    /// Cache for connectivity results
    pub connectivity_cache: HashMap<(usize, usize), bool>,
}
impl ConnectivityAnalyzer {
    #[must_use]
    pub fn new() -> Self {
        Self {
            analysis_depth: 5,
            connectivity_cache: HashMap::new(),
        }
    }
    #[must_use]
    pub const fn with_depth(mut self, depth: usize) -> Self {
        self.analysis_depth = depth;
        self
    }
}
/// Buffer pool for memory-efficient graph operations
#[derive(Debug, Clone)]
pub struct BufferPool<T> {
    pub size: usize,
    _phantom: std::marker::PhantomData<T>,
}
impl<T> BufferPool<T> {
    #[must_use]
    pub const fn new(size: usize) -> Self {
        Self {
            size,
            _phantom: std::marker::PhantomData,
        }
    }
}
/// Enhanced transpilation strategy with `SciRS2` graph optimization
#[derive(Debug, Clone, PartialEq)]
pub enum TranspilationStrategy {
    /// Minimize circuit depth
    MinimizeDepth,
    /// Minimize gate count
    MinimizeGates,
    /// Minimize error rate
    MinimizeError,
    /// Balanced optimization
    Balanced,
    /// `SciRS2` graph-based optimization
    SciRS2GraphOptimized {
        /// Graph optimization strategy
        graph_strategy: GraphOptimizationStrategy,
        /// Enable parallel processing
        parallel_processing: bool,
        /// Use advanced connectivity analysis
        advanced_connectivity: bool,
    },
    /// `SciRS2` machine learning guided optimization
    SciRS2MLGuided {
        /// ML model for cost prediction
        use_ml_cost_model: bool,
        /// Training data source
        training_data: Option<String>,
        /// Reinforcement learning for routing
        use_rl_routing: bool,
    },
    /// Custom strategy with weights
    Custom {
        depth_weight: f64,
        gate_weight: f64,
        error_weight: f64,
    },
}
/// Native gate set for a quantum device
#[derive(Debug, Clone, Serialize, Deserialize)]
pub struct NativeGateSet {
    /// Single-qubit gates
    pub single_qubit: HashSet<String>,
    /// Two-qubit gates
    pub two_qubit: HashSet<String>,
    /// Multi-qubit gates (if supported)
    pub multi_qubit: HashSet<String>,
    /// Parameterized gates
    pub parameterized: HashMap<String, usize>,
}
/// `SciRS2` graph optimization strategies
#[derive(Debug, Clone, PartialEq, Eq)]
pub enum GraphOptimizationStrategy {
    /// Minimum spanning tree based
    MinimumSpanningTree,
    /// Shortest path optimization
    ShortestPath,
    /// Maximum flow optimization
    MaximumFlow,
    /// Community detection based
    CommunityDetection,
    /// Spectral graph analysis
    SpectralAnalysis,
    /// Multi-objective optimization
    MultiObjective,
}
/// `SciRS2` graph optimization statistics
#[derive(Debug, Clone)]
pub struct SciRS2GraphStats {
    /// Graph construction time
    pub graph_construction_time: std::time::Duration,
    /// Graph optimization iterations performed
    pub optimization_iterations: usize,
    /// Final convergence value
    pub final_convergence: f64,
    /// Number of connectivity improvements
    pub connectivity_improvements: usize,
    /// Parallel processing effectiveness
    pub parallel_effectiveness: f64,
    /// Memory usage during optimization
    pub peak_memory_usage: usize,
    /// Spectral analysis metrics (if enabled)
    pub spectral_metrics: Option<SpectralAnalysisMetrics>,
}
/// SciRS2-specific transpiler configuration
#[derive(Debug, Clone)]
pub struct SciRS2TranspilerConfig {
    /// Enable graph-based parallel optimization
    pub enable_parallel_graph_optimization: bool,
    /// Buffer pool size for memory optimization
    pub buffer_pool_size: usize,
    /// Chunk size for large circuit processing
    pub chunk_size: usize,
    /// Enable advanced connectivity analysis
    pub enable_connectivity_analysis: bool,
    /// Graph optimization convergence threshold
    pub convergence_threshold: f64,
    /// Maximum graph optimization iterations
    pub max_graph_iterations: usize,
    /// Enable machine learning guided optimization
    pub enable_ml_guidance: bool,
    /// Cost function weights for multi-objective optimization
    pub cost_weights: HashMap<String, f64>,
    /// Enable spectral graph analysis
    pub enable_spectral_analysis: bool,
}
/// Spectral analysis metrics for graph optimization
#[derive(Debug, Clone)]
pub struct SpectralAnalysisMetrics {
    /// Graph eigenvalues
    pub eigenvalues: Vec<f64>,
    /// Connectivity number
    pub connectivity_number: f64,
    /// Spectral gap
    pub spectral_gap: f64,
    /// Graph regularity measure
    pub regularity_measure: f64,
}
/// Graph optimizer using `SciRS2` graph algorithms
#[derive(Debug, Clone)]
pub struct GraphOptimizer {
    /// Optimization configuration parameters
    pub config: HashMap<String, f64>,
    /// Enable advanced optimizations
    pub use_advanced: bool,
}
impl GraphOptimizer {
    #[must_use]
    pub fn new() -> Self {
        Self {
            config: HashMap::new(),
            use_advanced: true,
        }
    }
    #[must_use]
    pub fn with_config(mut self, key: String, value: f64) -> Self {
        self.config.insert(key, value);
        self
    }
}
/// Advanced path optimizer using `SciRS2` graph algorithms
#[derive(Debug, Clone)]
pub struct PathOptimizer {
    /// Optimization algorithm to use
    pub algorithm: PathAlgorithm,
    /// Maximum number of alternative paths to consider
    pub max_alternatives: usize,
}
impl PathOptimizer {
    #[must_use]
    pub const fn new() -> Self {
        Self {
            algorithm: PathAlgorithm::Dijkstra,
            max_alternatives: 5,
        }
    }
    #[must_use]
    pub const fn with_algorithm(mut self, algorithm: PathAlgorithm) -> Self {
        self.algorithm = algorithm;
        self
    }
}
/// Cost function evaluator for multi-objective optimization
#[derive(Debug, Clone)]
pub struct CostFunctionEvaluator {
    /// Weights for different optimization objectives
    weights: HashMap<String, f64>,
    /// Cached cost calculations
    cost_cache: HashMap<String, f64>,
    /// Enable advanced cost modeling
    advanced_modeling: bool,
}
impl CostFunctionEvaluator {
    /// Create a new cost function evaluator
    #[must_use]
    pub fn new(weights: HashMap<String, f64>) -> Self {
        Self {
            weights,
            cost_cache: HashMap::new(),
            advanced_modeling: true,
        }
    }
    /// Evaluate the total cost of a circuit configuration
    #[must_use]
    pub fn evaluate_cost(
        &self,
        depth: usize,
        gates: usize,
        error_rate: f64,
        swap_count: usize,
    ) -> f64 {
        let depth_cost = *self.weights.get("depth").unwrap_or(&0.4) * depth as f64;
        let gate_cost = *self.weights.get("gates").unwrap_or(&0.3) * gates as f64;
        let error_cost = *self.weights.get("error").unwrap_or(&0.3) * error_rate * 1000.0;
        let swap_cost = *self.weights.get("swap").unwrap_or(&0.1) * swap_count as f64;
        depth_cost + gate_cost + error_cost + swap_cost
    }
    /// Evaluate connectivity quality
    #[must_use]
    pub fn evaluate_connectivity(&self, connectivity_matrix: &[Vec<f64>]) -> f64 {
        if connectivity_matrix.is_empty() {
            return 0.0;
        }
        let n = connectivity_matrix.len();
        let mut total_connectivity = 0.0;
        let mut count = 0;
        for i in 0..n {
            for j in (i + 1)..n {
                total_connectivity += connectivity_matrix[i][j];
                count += 1;
            }
        }
        if count > 0 {
            total_connectivity / f64::from(count)
        } else {
            0.0
        }
    }
}
/// Device-specific hardware constraints and capabilities
#[derive(Debug, Clone, Serialize, Deserialize)]
pub struct HardwareSpec {
    /// Device name/identifier
    pub name: String,
    /// Maximum number of qubits
    pub max_qubits: usize,
    /// Qubit connectivity topology
    pub coupling_map: CouplingMap,
    /// Native gate set
    pub native_gates: NativeGateSet,
    /// Gate error rates
    pub gate_errors: HashMap<String, f64>,
    /// Qubit coherence times (T1, T2)
    pub coherence_times: HashMap<usize, (f64, f64)>,
    /// Gate durations in nanoseconds
    pub gate_durations: HashMap<String, f64>,
    /// Readout fidelity per qubit
    pub readout_fidelity: HashMap<usize, f64>,
    /// Cross-talk parameters
    pub crosstalk_matrix: Option<Vec<Vec<f64>>>,
    /// Calibration timestamp
    pub calibration_timestamp: std::time::SystemTime,
}
impl HardwareSpec {
    /// Create IBM Quantum device specification
    #[must_use]
    pub fn ibm_quantum() -> Self {
        let mut single_qubit = HashSet::new();
        single_qubit.extend(
            ["X", "Y", "Z", "H", "S", "T", "RZ", "RX", "RY"]
                .iter()
                .map(|s| (*s).to_string()),
        );
        let mut two_qubit = HashSet::new();
        two_qubit.extend(["CNOT", "CZ"].iter().map(|s| (*s).to_string()));
        let native_gates = NativeGateSet {
            single_qubit,
            two_qubit,
            multi_qubit: HashSet::new(),
            parameterized: [("RZ", 1), ("RX", 1), ("RY", 1)]
                .iter()
                .map(|(k, v)| ((*k).to_string(), *v))
                .collect(),
        };
        Self {
            name: "ibm_quantum".to_string(),
            max_qubits: 127,
            coupling_map: CouplingMap::grid(11, 12),
            native_gates,
            gate_errors: [("CNOT", 0.01), ("RZ", 0.0001)]
                .iter()
                .map(|(k, v)| ((*k).to_string(), *v))
                .collect(),
            coherence_times: HashMap::new(),
            gate_durations: [("CNOT", 300.0), ("RZ", 0.0)]
                .iter()
                .map(|(k, v)| ((*k).to_string(), *v))
                .collect(),
            readout_fidelity: HashMap::new(),
            crosstalk_matrix: None,
            calibration_timestamp: std::time::SystemTime::now(),
        }
    }
    /// Create Google Quantum AI device specification
    #[must_use]
    pub fn google_quantum() -> Self {
        let mut single_qubit = HashSet::new();
        single_qubit.extend(
            ["X", "Y", "Z", "H", "RZ", "SQRT_X"]
                .iter()
                .map(|s| (*s).to_string()),
        );
        let mut two_qubit = HashSet::new();
        two_qubit.extend(["CZ", "ISWAP"].iter().map(|s| (*s).to_string()));
        let native_gates = NativeGateSet {
            single_qubit,
            two_qubit,
            multi_qubit: HashSet::new(),
            parameterized: [("RZ", 1)]
                .iter()
                .map(|(k, v)| ((*k).to_string(), *v))
                .collect(),
        };
        Self {
            name: "google_quantum".to_string(),
            max_qubits: 70,
            coupling_map: CouplingMap::grid(8, 9),
            native_gates,
            gate_errors: [("CZ", 0.005), ("RZ", 0.0001)]
                .iter()
                .map(|(k, v)| ((*k).to_string(), *v))
                .collect(),
            coherence_times: HashMap::new(),
            gate_durations: [("CZ", 20.0), ("RZ", 0.0)]
                .iter()
                .map(|(k, v)| ((*k).to_string(), *v))
                .collect(),
            readout_fidelity: HashMap::new(),
            crosstalk_matrix: None,
            calibration_timestamp: std::time::SystemTime::now(),
        }
    }
    /// Create AWS Braket device specification
    #[must_use]
    pub fn aws_braket() -> Self {
        let mut single_qubit = HashSet::new();
        single_qubit.extend(
            ["X", "Y", "Z", "H", "RZ", "RX", "RY"]
                .iter()
                .map(|s| (*s).to_string()),
        );
        let mut two_qubit = HashSet::new();
        two_qubit.extend(["CNOT", "CZ", "ISWAP"].iter().map(|s| (*s).to_string()));
        let native_gates = NativeGateSet {
            single_qubit,
            two_qubit,
            multi_qubit: HashSet::new(),
            parameterized: [("RZ", 1), ("RX", 1), ("RY", 1)]
                .iter()
                .map(|(k, v)| ((*k).to_string(), *v))
                .collect(),
        };
        Self {
            name: "aws_braket".to_string(),
            max_qubits: 100,
            coupling_map: CouplingMap::all_to_all(100),
            native_gates,
            gate_errors: [("CNOT", 0.008), ("RZ", 0.0001)]
                .iter()
                .map(|(k, v)| ((*k).to_string(), *v))
                .collect(),
            coherence_times: HashMap::new(),
            gate_durations: [("CNOT", 200.0), ("RZ", 0.0)]
                .iter()
                .map(|(k, v)| ((*k).to_string(), *v))
                .collect(),
            readout_fidelity: HashMap::new(),
            crosstalk_matrix: None,
            calibration_timestamp: std::time::SystemTime::now(),
        }
    }
    /// Create generic device specification for testing
    #[must_use]
    pub fn generic() -> Self {
        let mut single_qubit = HashSet::new();
        single_qubit.extend(
            ["X", "Y", "Z", "H", "S", "T", "RZ", "RX", "RY"]
                .iter()
                .map(|s| (*s).to_string()),
        );
        let mut two_qubit = HashSet::new();
        two_qubit.extend(
            ["CNOT", "CZ", "ISWAP", "SWAP"]
                .iter()
                .map(|s| (*s).to_string()),
        );
        let mut multi_qubit = HashSet::new();
        multi_qubit.extend(["Toffoli", "Fredkin"].iter().map(|s| (*s).to_string()));
        let native_gates = NativeGateSet {
            single_qubit,
            two_qubit,
            multi_qubit,
            parameterized: [("RZ", 1), ("RX", 1), ("RY", 1)]
                .iter()
                .map(|(k, v)| ((*k).to_string(), *v))
                .collect(),
        };
        Self {
            name: "generic".to_string(),
            max_qubits: 1000,
            coupling_map: CouplingMap::all_to_all(1000),
            native_gates,
            gate_errors: HashMap::new(),
            coherence_times: HashMap::new(),
            gate_durations: HashMap::new(),
            readout_fidelity: HashMap::new(),
            crosstalk_matrix: None,
            calibration_timestamp: std::time::SystemTime::now(),
        }
    }
}
/// Enhanced transpilation options with `SciRS2` features
#[derive(Debug, Clone)]
pub struct TranspilationOptions {
    /// Target hardware specification
    pub hardware_spec: HardwareSpec,
    /// Optimization strategy
    pub strategy: TranspilationStrategy,
    /// Maximum optimization iterations
    pub max_iterations: usize,
    /// Enable aggressive optimizations
    pub aggressive: bool,
    /// Seed for random number generation
    pub seed: Option<u64>,
    /// Initial qubit layout (if None, will be optimized)
    pub initial_layout: Option<HashMap<QubitId, usize>>,
    /// Skip routing if circuit already satisfies connectivity
    pub skip_routing_if_connected: bool,
    /// `SciRS2` specific configuration
    pub scirs2_config: SciRS2TranspilerConfig,
}
/// Available path optimization algorithms
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub enum PathAlgorithm {
    /// Dijkstra's shortest path
    Dijkstra,
    /// A* with heuristic
    AStar,
    /// k-shortest paths
    KShortest,
}
/// Result of transpilation
#[derive(Debug, Clone)]
pub struct TranspilationResult<const N: usize> {
    /// Transpiled circuit
    pub circuit: Circuit<N>,
    /// Final qubit mapping
    pub final_layout: HashMap<QubitId, usize>,
    /// Routing statistics
    pub routing_stats: Option<RoutingResult>,
    /// Transpilation statistics
    pub transpilation_stats: TranspilationStats,
    /// Applied transformations
    pub applied_passes: Vec<String>,
}
/// Enhanced transpilation statistics with `SciRS2` metrics
#[derive(Debug, Clone)]
pub struct TranspilationStats {
    /// Original circuit depth
    pub original_depth: usize,
    /// Final circuit depth
    pub final_depth: usize,
    /// Original gate count
    pub original_gates: usize,
    /// Final gate count
    pub final_gates: usize,
    /// Added SWAP gates
    pub added_swaps: usize,
    /// Estimated error rate
    pub estimated_error: f64,
    /// Transpilation time
    pub transpilation_time: std::time::Duration,
    /// `SciRS2` graph optimization metrics
    pub graph_optimization_stats: SciRS2GraphStats,
}