use std::sync::Arc;
use probe_rs_target::Chip;
use crate::{
architecture::riscv::{
communication_interface::RiscvCommunicationInterface, sequences::RiscvDebugSequence,
},
config::sequences::esp::EspFlashSizeDetector,
MemoryInterface,
};
#[derive(Debug)]
pub struct ESP32C6 {
inner: EspFlashSizeDetector,
}
impl ESP32C6 {
pub fn create(chip: &Chip) -> Arc<dyn RiscvDebugSequence> {
Arc::new(Self {
inner: EspFlashSizeDetector {
stack_pointer: EspFlashSizeDetector::stack_pointer(chip),
load_address: 0, spiflash_peripheral: 0x6000_3000,
attach_fn: 0x4000_01DC,
},
})
}
}
impl RiscvDebugSequence for ESP32C6 {
fn on_connect(&self, interface: &mut RiscvCommunicationInterface) -> Result<(), crate::Error> {
tracing::info!("Disabling esp32c6 watchdogs...");
interface.write_word_32(0x600B1C20, 0x50D83AA1)?; let current = interface.read_word_32(0x600B_1C1C)?;
interface.write_word_32(0x600B_1C1C, current | 1 << 18)?; interface.write_word_32(0x600B1C20, 0x0)?; interface.write_word_32(0x6000_8064, 0x50D83AA1)?; interface.write_word_32(0x6000_8048, 0x0)?;
interface.write_word_32(0x6000_8064, 0x0)?; interface.write_word_32(0x6000_9064, 0x50D83AA1)?; interface.write_word_32(0x6000_9048, 0x0)?;
interface.write_word_32(0x6000_9064, 0x0)?; interface.write_word_32(0x600B_1C18, 0x50D83AA1)?; interface.write_word_32(0x600B_1C00, 0x0)?;
interface.write_word_32(0x600B_1C18, 0x0)?; Ok(())
}
fn detect_flash_size(
&self,
interface: &mut RiscvCommunicationInterface,
) -> Result<Option<usize>, crate::Error> {
self.inner.detect_flash_size_riscv(interface)
}
}