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use super::super::memory::romtable::CoresightComponent;
use crate::architecture::arm::ArmProbeInterface;
use crate::Error;
const REGISTER_OFFSET_SWO_CODR: u32 = 0x10;
const REGISTER_OFFSET_SWO_SPPR: u32 = 0xF0;
const REGISTER_OFFSET_ACCESS: u32 = 0xFB0;
pub struct Swo<'a> {
component: &'a CoresightComponent,
interface: &'a mut dyn ArmProbeInterface,
}
impl<'a> Swo<'a> {
pub fn new(
interface: &'a mut dyn ArmProbeInterface,
component: &'a CoresightComponent,
) -> Self {
Swo {
component,
interface,
}
}
pub fn unlock(&mut self) -> Result<(), Error> {
self.component
.write_reg(self.interface, REGISTER_OFFSET_ACCESS, 0xC5AC_CE55)?;
Ok(())
}
pub fn set_prescaler(&mut self, value: u32) -> Result<(), Error> {
self.component
.write_reg(self.interface, REGISTER_OFFSET_SWO_CODR, value)?;
Ok(())
}
pub fn set_pin_protocol(&mut self, value: u32) -> Result<(), Error> {
self.component
.write_reg(self.interface, REGISTER_OFFSET_SWO_SPPR, value)?;
Ok(())
}
}