open_cl_low_level/
cl_bitflags.rs1use ffi::*;
2
3bitflags! {
4 pub struct DeviceType: cl_device_type {
5 const DEFAULT = 1;
6 const CPU = 2;
7 const GPU = 4;
8 const ACCELERATOR = 8;
9 const CUSTOM = 16;
10 const ALL = 0xFFFF_FFFF;
11 }
12}
13
14impl From<DeviceType> for cl_device_type {
15 fn from(d: DeviceType) -> cl_device_type {
16 d.bits()
17 }
18}
19
20bitflags! {
22 pub struct DeviceFpConfig: cl_device_fp_config {
23 const DENORM = 1;
24 const INF_NAN = 2;
25 const ROUND_TO_NEAREST = 4;
26 const ROUND_TO_ZERO = 8;
27 const ROUND_TO_INF = 16;
28 const FMA = 32;
29 const SOFT_FLOAT = 64;
30 const CORRECTLY_ROUNDED_DIVIDE_SQRT = 128;
31 }
32}
33
34impl From<DeviceFpConfig> for cl_device_fp_config {
35 fn from(d: DeviceFpConfig) -> cl_device_fp_config {
36 d.bits()
37 }
38}
39
40bitflags! {
41 pub struct DeviceExecCapabilities: cl_device_exec_capabilities {
42 const KERNEL = 1;
43 const NATIVE_KERNEL = 2;
44 }
45}
46
47impl From<DeviceExecCapabilities> for cl_device_exec_capabilities {
48 fn from(d: DeviceExecCapabilities) -> cl_device_exec_capabilities {
49 d.bits()
50 }
51}
52
53bitflags! {
54 pub struct DeviceAffinityDomain: cl_device_affinity_domain {
55 const NONE_SUPPORTED = 0;
56 const NUMA = 1;
57 const L4_CACHE = 2;
58 const L3_CACHE = 4;
59 const L2_CACHE = 8;
60 const L1_CACHE = 16;
61 const NEXT_PARTITIONABLE = 32;
62 }
63}
64
65impl From<DeviceAffinityDomain> for cl_device_affinity_domain {
66 fn from(d: DeviceAffinityDomain) -> cl_device_affinity_domain {
67 d.bits()
68 }
69}
70
71bitflags! {
72 pub struct HostAccessMemFlags: cl_mem_flags {
73 const READ_WRITE = 0;
74 const WRITE_ONLY = 1 << 7;
75 const READ_ONLY = 1 << 8;
76 const NO_ACCESS = 1 << 9;
77 }
78}
79
80impl From<HostAccessMemFlags> for MemFlags {
81 fn from(access: HostAccessMemFlags) -> MemFlags {
82 unsafe { MemFlags::from_bits_unchecked(access.bits()) }
83 }
84}
85
86impl From<MemFlags> for Option<HostAccessMemFlags> {
87 fn from(mem_flags: MemFlags) -> Option<HostAccessMemFlags> {
88 HostAccessMemFlags::from_bits(mem_flags.bits())
89 }
90}
91
92bitflags! {
93 pub struct KernelAccessMemFlags: cl_mem_flags {
94 const READ_WRITE = 1;
95 const WRITE_ONLY = 1 << 1;
96 const READ_ONLY = 1 << 2;
97 }
98}
99
100impl From<KernelAccessMemFlags> for MemFlags {
101 fn from(access: KernelAccessMemFlags) -> MemFlags {
102 unsafe { MemFlags::from_bits_unchecked(access.bits()) }
103 }
104}
105
106impl From<MemFlags> for Option<KernelAccessMemFlags> {
107 fn from(mem_flags: MemFlags) -> Option<KernelAccessMemFlags> {
108 KernelAccessMemFlags::from_bits(mem_flags.bits())
109 }
110}
111
112bitflags! {
113 pub struct MemLocationMemFlags: cl_mem_flags {
114 const KEEP_IN_PLACE = 1 << 3;
116
117 const ALLOC_ON_DEVICE = 1 << 4;
119
120 const COPY_TO_DEVICE = 1 << 5;
122
123 const FORCE_COPY_TO_DEVICE = Self::ALLOC_ON_DEVICE.bits() | Self::COPY_TO_DEVICE.bits();
125 }
126}
127
128impl From<MemLocationMemFlags> for MemFlags {
129 fn from(loc: MemLocationMemFlags) -> MemFlags {
130 unsafe { MemFlags::from_bits_unchecked(loc.bits()) }
131 }
132}
133
134impl From<MemFlags> for Option<MemLocationMemFlags> {
135 fn from(mem_flags: MemFlags) -> Option<MemLocationMemFlags> {
136 MemLocationMemFlags::from_bits(mem_flags.bits())
137 }
138}
139
140bitflags! {
141 pub struct MemFlags: cl_mem_flags {
142 const EMPTY = 0;
143 const KERNEL_READ_WRITE = 1;
144 const KERNEL_WRITE_ONLY = 1 << 1;
145 const KERNEL_READ_ONLY = 1 << 2;
146
147 const ALLOC_HOST_PTR = 1 << 4;
148 const USE_HOST_PTR = 1 << 3;
149 const COPY_HOST_PTR = 1 << 5;
150
151 const HOST_WRITE_ONLY = 1 << 7;
152 const HOST_READ_ONLY = 1 << 8;
153 const HOST_NO_ACCESS = 1 << 9;
154 const HOST_READ_WRITE = 0;
155
156 const READ_WRITE_ALLOC_HOST_PTR = Self::KERNEL_READ_WRITE.bits() | Self::ALLOC_HOST_PTR.bits();
162 const READ_ONLY_ALLOC_HOST_PTR = Self::KERNEL_READ_ONLY.bits() | Self::ALLOC_HOST_PTR.bits();
163 const WRITE_ONLY_ALLOC_HOST_PTR = Self::KERNEL_WRITE_ONLY.bits() | Self::ALLOC_HOST_PTR.bits();
164 }
165}
166
167impl From<MemFlags> for cl_mem_flags {
168 fn from(d: MemFlags) -> cl_mem_flags {
169 d.bits()
170 }
171}
172
173bitflags! {
174 pub struct CommandQueueProperties: cl_command_queue_properties {
175 const OUT_OF_ORDER_EXEC_MODE_ENABLE = 1;
176 const PROFILING_ENABLE = 1 << 1;
177 const ON_DEVICE = 1 << 2;
178 const ON_DEVICE_DEFAULT = 1 << 3;
179 }
180}
181
182impl Default for CommandQueueProperties {
183 fn default() -> CommandQueueProperties {
184 CommandQueueProperties::PROFILING_ENABLE
185 }
186}
187
188impl From<CommandQueueProperties> for cl_command_queue_properties {
189 fn from(d: CommandQueueProperties) -> cl_command_queue_properties {
190 d.bits()
191 }
192}